ADC test methods using an impure stimulus: A survey

Pipelined analog-to-digital converters (ADCs) are fundamental components of various signal processing systems requiring high sampling rates and a high linearity. Over the past years, calibration techniques have been intensively investigated to increase the linearity. In this work, we propose an equalization-based calibration technique which does not require knowledge of the ADC input signal for calibration. For that, a test signal and a scaled version of it are fed into the ADC sequentially, while only the corresponding output samples are used for calibration. Several test signal sources are possible, such as a signal generator (SG) or the system application (SA) itself. For the latter case, the presented method corresponds to a background calibration technique. Thus, slowly changing errors are tracked and calibrated continuously. Because of the low computational complexity of the calibration technique, it is suitable for an onchip implementation. Ultimately, this work contains an analysis of the stability and convergence behavior as well as simulation results.

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“…test SG [12]. In [13] a histogram-based method is introduced, which relaxes the linearity requirements of the test SG heavily.…”

Section: Introductionmentioning

confidence: 99%