ADC built-in-self-test based on a pseudorandom uniform noise generator

Abstract

This paper describes a digital built-in-self-test (BIST) solution to ADC dynamic performance testing. The proposed ADC BIST system is based in a uniform histogram approach to test the linearity of ADCs. A pipeline ADC with a resolution of 10 bits, a DAC with the same resolution as the ADC under test and the proposed BIST scheme were modeled and simulated in MATLAB to prove its validity. Several 32 bits pseudorandom uniform noise generators were evaluated. When compared with the Gaussian histogram approach, the obtained results show that the error on the maximum INL is 0.13 LSB for the Mersenne twister pseudorandom uniform noise generator and an adequate statistical significance is obtained with a quarter of the samples. Additionally, the number and complexity of the circuits are reduced.

A digital pseudorandom uniform noise generator for ADC built-in self-test

“…The obtained results were compared with the histogram tests with a Gaussian noise generator, obtained with 2 23 samples. The simulations shown that this kind of ADC characterization with the UNG is quite effective for 2 21 samples [3].…”

“…Some simulations were previously made [3] and one of the algorithms which has shown better results was the 32 bit Mersenne-Twister (the other algorithm was the 32 bit multiplicative congruental generator [34]). To mitigate the uniformity error of the pseudorandom UNG a long sequence is needed so the choice was the Mersenne-Twister algorithm with a period of 2 19937 -1.…”

“…The block selector is used in the multiplication of y with the matrix A, (3). This selector is defined as: In Figure 2, are presented the inputs and outputs pins of the top level module of the implemented algorithm.…”

“…Discrete implementations usually lead to larger power dissipations and die areas since a digital-to-analogue converter and a low-pass filter are required to provide an analogue continuous-time output, but when compared to the implementation of the analog uniform noise generator presented in [33] the proposed digital circuit has two important advantages: it does not need two Gaussian noise generators, as it only needs one pseudorandom uniform generator; the distribution of amplitudes is not limited by the circuit supply voltage (it depends on the used DAC). When compared with BIST with Gaussian noise generators, other two advantages appear: just 1/4 of the number of samples is required to reach the adequate statistical significance; and the implementation of the histogram method does not require complex functions and/or large tables [3].…”

A chaotic switched-capacitor circuit for characteristic CMOS noise distributions generation

“…In many of these areas, embedding and compactness requirements call for simpler possible realizations. Actually, embedded noise generators are required for the implementation of Built-In Self-Test (BIST) techniques [6].…”