Adaptor Synthesis for Real-Time Components

Abstract

Abstract. Building a real-time system from reusable or COTS components introduces several problems, mainly related to compatibility, communication, and QoS issues. We propose an approach to automatically derive adaptors in order to solve black-box integration anomalies, when possible. We consider black-box components equipped with an expressive interface that specifies the interaction behavior with the expected environment, the component clock, as well as latency, duration, and controllability of the component's actions. The principle of adaptor synthesis is to coordinate the interaction behavior of the components in order to avoid possible mismatches, such as deadlocks. Each adaptor models the correct assembly code for a set of components. Our approach is based on labeled transition systems and Petri nets, and is implemented in a tool called SynthesisRT. We illustrate it through a case study concerning a remote medical care system.

CONNECT Challenges: Towards Emergent Connectors for Eternal Networked Systems

“…The University of L'Aquila proposed, in cooperation with others, an approach to the automatic adapter synthesis for real-time components [62]. Although this approach deals with both functional and non-functional information, its limit is that it synthesizes only a model of the adapter.…”

Multi-clock Soc design using protocol conversion

“…It shows that each technique uses different representations for protocols and algorithms to find a converter 1 . Furthermore, some approaches like [5] and [12] [6] does not allow converters to explicitly buffer control signals. The handling of data-width mismatches is limited in most existing approaches while none handle the conversion of multi-clock systems.…”

“…First, IP protocols are described using synchronous Kripke structures, or SKS, that describe IPs' behaviours with respect to their individual clocks. Next, each SKS is oversampled [5,12] with respect to the fastest clock in the SoC, in order to ensure that all SKS describe the behaviour of individual protocols with respect to a single-clock system. All oversampled protocols are then composed using synchronous parallel composition that produces their maximal combined behaviour in the form of a single SKS.…”

Application-Layer Connector Synthesis

“…This mismatch can be solved by synthesizing a software coordinator that supervises the components' interaction by preventing the deadlock [73,8,72]. At the level of the coordinator's actual code, the coordinator is synthesized as a multi-threaded component that creates a thread for each request and for each caller performing such a request.…”