Adaptive performance compensation with in-situ timing error prediction for subthreshold circuits

Fuketa, Hiroshi; Hashimoto, Masanori; Mitsuyama, Yukio; Onoye, Takao

doi:10.1109/cicc.2009.5280882

Cited by 18 publications

(14 citation statements)

References 21 publications

(32 reference statements)

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“…We designed and fabricated a test circuit to validate the adaptive speed control with TEP-FF in a 65-nm CMOS process [21]. Measurement results are shown in this section.…”

Section: B Silicon Resultsmentioning

confidence: 99%

“…The proposed method reduces the estimate error by 11.1%-73.4% and provides more accurate estimation thanks to the consideration of random variations. Figure 2 shows a circuit that adaptively controls the speed and power dissipation using a warning signal generated by a timing-error predictive (TEP) FF [19]- [21]. The TEP-FF consists of a normal flip-flop, a delay buffer and a comparator (XOR gate).…”

Section: On-chip Variation Sensors For Device-parameter Extractionmentioning

confidence: 99%

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Adaptive performance compensation with on-chip variation monitoring

Hashimoto

Fuketa

2011

2011 IEEE 54th International Midwest Symposium on Circuits and Systems (MWSCAS)

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Abstract-This paper discusses adaptive performance control with two types of on-chip variation sensors. The first sensor aims to extract several device-parameters for performance adaptation from a set of on-chip ring-oscillators with different sensitivities to device-parameters, and the device-parameter decomposition is discussed. The second sensors, which are embedded into functional circuits, predict timing errors due to PVT variations and aging. By controlling circuit performance according to the sensor outputs, PVT worst-case design can be overcome and power dissipation can be reduced while satisfying performance requirements. Measurement results of a subthreshold adder on 65-nm test chips show that the adaptive speed control can compensate PVT variations and improve energy efficiency by up to 46% compared to the worst-case design and operation with guardbanding.

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“…We designed and fabricated a test circuit to validate the adaptive speed control with TEP-FF in a 65-nm CMOS process [21]. Measurement results are shown in this section.…”

Section: B Silicon Resultsmentioning

confidence: 99%

Section: On-chip Variation Sensors For Device-parameter Extractionmentioning

confidence: 99%

Adaptive performance compensation with on-chip variation monitoring

Hashimoto

Fuketa

2011

2011 IEEE 54th International Midwest Symposium on Circuits and Systems (MWSCAS)

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“…can be applied here. SlackProbe also allows monitors to be inserted at path endpoints where monitors as in [7]- [9], [11] can be used as well. Since the additional margin makes the monitor detect an impending timing failure rather than an actual one, there is no datapath metastability issue as discussed in [17].…”

Section: A Monitor Working Principlementioning

confidence: 99%

SlackProbe: A Low Overhead In Situ On-line Timing Slack Monitoring Methodology

Lai¹,

Chandra

Aitken

et al. 2013

Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE), 2013

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Abstract-In situ monitoring is an accurate way to monitor circuit delay or timing slack, but usually incurs significant overhead. We observe that most existing slack monitoring methods exclusively focus on monitoring path ending registers, which is not cost efficient from power and area perspectives.In this paper, we propose SlackProbe methodology, which inserts timing slack monitors like "probes" at a selected set of nets, including intermediate nets along critical paths. SlackProbe can significantly reduce the total number of monitors required at the cost of some additional delay margin. It can be used to detect impending delay failures due to various reasons (process variations, ambient fluctuations, circuit aging, etc.) and can be used with various preventive actions (e.g. voltage/frequency scaling, clock stretching/time borrowing, etc.). Though we focus on monitor selection in this work, we give an example of using SlackProbe with adaptive voltage scaling.Experimental results on commercial processors show that with 5% more timing margin, SlackProbe can reduce the number of monitors by 15-18X as compared to the number of monitors inserted at path ending pins.

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Section: A Monitor Working Principlementioning

confidence: 99%

“…Razor [7], [8] uses customized flip-flops to detect timing failures due to setup time violation and correct them through a pipeline flush or architectural replay. Similar approaches that reduce timing margin, but not to the point of failure, include delaying data signals [9], advancing clock signals [10] or using different flip-flop structures [11]- [15].…”

Section: Introductionmentioning

confidence: 99%

SlackProbe: A Flexible and Efficient In Situ Timing Slack Monitoring Methodology

Lai

Chandra

Aitken

et al. 2014

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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Abstract-In situ monitoring is an accurate way to monitor circuit delay or timing slack, but usually incurs significant overhead. We observe that most existing slack monitoring methods focus exclusively on monitoring path endpoints, which is not cost efficient from power and area perspectives.In this paper, we first propose SlackProbe methodology, which inserts timing slack monitors like "probes" at a selected set of nets, including intermediate nets along critical paths. SlackProbe can be used to detect impending delay failures due to various reasons (process variations, ambient fluctuations, circuit aging, etc.) and can be used with various preventive actions (e.g., voltage/frequency scaling, clock stretching/time borrowing, etc.). Then we perform thorough analysis of the potential benefits and caveats of SlackProbe over conventional approaches in terms of number of monitors required, monitoring efficiency and observability, delay margin, and design perturbation. Experimental results on commercial processors show that with 5% extra timing margin, SlackProbe can reduce the number of monitors by 12-16X as compared to the number of monitors inserted at path ending pins. SlackProbe can also improve the monitoring efficiency by up to 1.9X and improve the monitoring observability by up to 32%, as compared to endpoint monitoring.

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Adaptive performance compensation with in-situ timing error prediction for subthreshold circuits

Cited by 18 publications

References 21 publications

Adaptive performance compensation with on-chip variation monitoring

Adaptive performance compensation with on-chip variation monitoring

SlackProbe: A Low Overhead In Situ On-line Timing Slack Monitoring Methodology

SlackProbe: A Flexible and Efficient In Situ Timing Slack Monitoring Methodology

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