Adaptive Dynamic Shortest Path Search Algorithm in Networks-on-Chip Based on Circulant Topologies

Monakhov, O. G.; Монахова, Э. А.; Romanov, A. Yu.; Sukhov, Andrei M.; Lezhnev, E. V.

doi:10.1109/access.2021.3131635

Cited by 11 publications

(5 citation statements)

References 28 publications

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“…The algebraic properties of circulant graphs have been studied in thousands of publications. Circulant graphs have been handled in a variety of graph applications, including wide area communication graphs, local area computer graphs, parallel processing architectures, very large-scale integrated circuit design, and distributed computing [11][12][13].…”

Section: Introductionmentioning

confidence: 99%

Decompositions of Circulant-Balanced Complete Multipartite Graphs Based on a Novel Labelling Approach

El-Mesady

Bazighifan

2022

Journal of Function Spaces

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For applied scientists and engineers, graph theory is a strong and vital tool for evaluating and inventing solutions for a variety of issues. Graph theory is extremely important in complex systems, particularly in computer science. Many scientific areas use graph theory, including biological sciences, engineering, coding, and operational research. A strategy for the orthogonal labelling of a bipartite graph G with n edges has been proposed in the literature, yielding cyclic decompositions of balanced complete bipartite graphs K n , n by the graph G . A generalization to circulant-balanced complete multipartite graphs K n , n , ⋯ , n ⏟ m ; m , n ≥ 2 , is our objective here. In this paper, we expand the orthogonal labelling approach used to generate cyclic decompositions for K n , n to a generalized orthogonal labelling approach that may be used for decomposing K n , n , ⋯ , n ⏟ m . We can decompose K n , n , ⋯ , n ⏟ m into distinct graph classes based on the proposed generalized orthogonal labelling approach.

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Section: Introductionmentioning

confidence: 99%

Decompositions of Circulant-Balanced Complete Multipartite Graphs Based on a Novel Labelling Approach

El-Mesady

Bazighifan

2022

Journal of Function Spaces

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“…The ECAD software HDLNoCGen [43] was developed in C#; it implements the presented NoC low-level modeling architecture and provides support for circulant topologies for a NoC [8], [49]. It includes components for setting up the generation of the model core, tools for collecting data from the model core, as well as tools for managing the generation of data packets:  model tuning module, which receives the necessary data for the parametric generation of the NoC communication subsystem, generates the core of the model, and also launches the model to obtain the working results;  data processing module, which is necessary to obtain the results of the model and generate test data for the submission to the model in real time, as well as to collect the results of the modeling and compare them with the results of high-level modeling.…”

Section: B Ecad Architecture For Low-level Noc Modelingmentioning

confidence: 99%

Electronic Computer-Aided Design for Low-Level Modeling of Networks-on-Chip

Lezhnev,

Zunin,

Amerikanov

et al. 2024

IEEE Access

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This article proposes a Network-on-Chip (NoC) communication subsystem model on the basis of which the Electronic Computer-Aided Design (ECAD) architecture in the form of software is implemented. It makes it possible to automate the process of preparing and generating an HDL description of the NoC model in the Verilog language. It is shown that not in all cases it is required to model the entire NoC. Often, it is necessary to model its certain parts, such as a communication subsystem, routing algorithm, and traffic control system. The developed model allows modeling a parameterized NoC communication subsystem to obtain an estimate of the consumed logical blocks and registers required for prototyping the communication subsystem. All components of the communication subsystem are implemented as separate modules due to which the hardware costs for adding the necessary components for the study are reduced because of the absence of the need to completely rework the model program code every time. The effectiveness of using the developed ECAD and low-level modeling automation methods to study the work of routing algorithms for NoC topologies is demonstrated.INDEX TERMS electronic computer-aided design (ECAD), HDL, network-on-chip (NoC), modeling, RTL.

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“…Over time, many topologies for interconnection networks have been proposed. The goal in newly designed networks is to reduce latency, usually by adding links to create shortcuts, as in octagon [42], [43], spidergon [44], [45], Quarc [46] which are obtained starting from the ring network, or also networks based on circulating graphs [47], [48]. Another approach is to design low-diameter networks using hierarchical composition, by combining different topologies on different levels of hierarchy.…”

Section: Related Workmentioning

confidence: 99%

Realizing Optimal All-to-All Personalized Communication Using Butterfly-Based Networks

Izzi

Massini

2023

IEEE Access

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The communication network is a key component in parallel and distributed systems, highperformance computing (HPC) systems and Data Centers, as information exchange has a key role in communication-intensive applications. The all-to-all personalized exchange is a relevant communication pattern and has been extensively studied for many network topologies. When considering a Multistage Interconnection Network (MIN) with log N stages, the realization of all-to-all communication is obtained through a sequence of admissible permutations forming a Latin square. If a particular Latin square is desired, double MINs consisting of 2 log N -1 stages are required. In this work, we consider the Butterfly-Butterfly network to realize the Latin square consisting of the identity permutation and its N − 1 rotations, RLS, and we show how to obtain the sequence of rotations forming such a Latin square, without storing it. We propose a method to realize the N permutations in pipeline fashion taking optimal O(N ) time, and we analyze the energy consumption according to the order of realization of the permutations, both on Butterfly-Butterfly network and on a single Butterfly used twice. We also show how to generate a Latin Square starting from any realizable permutation exploiting the switch configurations of the RLS.

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Adaptive Dynamic Shortest Path Search Algorithm in Networks-on-Chip Based on Circulant Topologies

Cited by 11 publications

References 28 publications

Decompositions of Circulant-Balanced Complete Multipartite Graphs Based on a Novel Labelling Approach

Decompositions of Circulant-Balanced Complete Multipartite Graphs Based on a Novel Labelling Approach

Electronic Computer-Aided Design for Low-Level Modeling of Networks-on-Chip

Realizing Optimal All-to-All Personalized Communication Using Butterfly-Based Networks

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