Adaptation and comparative analysis of HSPICE level‐61 and level‐62 model for a‐IGZO thin film transistors

Abstract

This paper presents a Computer‐aided design (CAD) model for a‐IGZO thin film transistors (TFTs) by adapting SPICE level‐61 RPI a‐Si: H (Hydrogenated Amorphous Silicon) TFT model and level‐62 RPI Poly‐Si (Poly Silicon) TFT model. This work provides a complete understanding of SPICE level‐61 and 62 model parameters, which must be tuned for a‐IGZO TFT simulation. The adapted SPICE models of level‐61 and level‐62 could model all regions of operation of the TFT, that is, above‐threshold and below‐threshold regions. Adapted RPI poly‐Si model also shows the kink effect in ZnO thin film transistors (TFTs) due to the recombination of electron–hole pairs in the channel via boundary trap states present in the poly‐Si TFTs thereby increasing the drain current in the transistors above pinch‐off region. The extracted performance parameters of the adapted models were found to be contiguous with experimental results. The maximum deviation in the subthreshold slope is approximately 5 mV/decade for level‐61 a‐Si TFT, and for level‐62 poly‐Si TFT, deviation in the subthreshold slope is even less, that is, 0.2 mV/decade. The experimental and simulated characteristics, extracted on‐to‐off ratio, negative bias reverse saturation current, and threshold voltage were almost similar. However, an average deviation of 2.4% and 2.27% was observed in the output characteristics of the adapted level‐61 and level‐62 models, respectively.