Adaptable Security in Wireless Sensor Networks by Using Reconfigurable ECC Hardware Coprocessors

Abstract

Specific features of Wireless Sensor Networks (WSNs) like the open accessibility to nodes, or the easy observability of radio communications, lead to severe security challenges. The application of traditional security schemes on sensor nodes is limited due to the restricted computation capability, low-power availability, and the inherent low data rate. In order to avoid dependencies on a compromised level of security, a WSN node with a microcontroller and a Field Programmable Gate Array (FPGA) is used along this work to implement a state-of-the art solution based on ECC (Elliptic Curve Cryptography). In this paper it is described how the reconfiguration possibilities of the system can be used to adapt ECC parameters in order to increase or reduce the security level depending on the application scenario or the energy budget. Two setups have been created to compare the softwareand hardware-supported approaches. According to the results, the FPGA-based ECC implementation requires three orders of magnitude less energy, compared with a low power microcontroller implementation, even considering the power consumption overhead introduced by the hardware reconfiguration.

A Comprehensive and Comparative Study of Elliptic Curve Cryptography Hardware Implementations for WSN

“…From the below table that summarizes the set of hardware implementations of ECC in WSN already detailed in the previous sub-section, binary fields is used in the majority of implementations [36]- [39], [41], [42] and few over primary field F p [28], [40] [42] is the fastest with 84µs for point multiplication and relatively less consuming energy with 55µW comparing it with other primitives. Implementation in [38] performed ECC operation with area, time and consumption trade-off that are respectively 8104 gates, 115ms and 30µW.…”

“…Implementation in [38] performed ECC operation with area, time and consumption trade-off that are respectively 8104 gates, 115ms and 30µW. For WSN security, although most of the reviewed implementations were implemented on Application Specific Integrated Circuits (ASIC) [28], [36]- [39], [42], ECC can be implemented in FPGA [40], [41]. The lack of these works is the fact that most of them not implement the full scheme of key exchange and authentication with respectively ECDH and ECDSA which allows to strengthen the security of WSN and to resolve some constraints found in software implementation such as power, performance and area.…”

“…Moreover, squaring is considered a special case of multiplication, and inversion is avoided mostly by use of projective coordinates. The results are promising: using 8104 gates ( [41] presented an HW/SW implementation of an ECC based on an 8052 compliant microcontroller and a Xilinx XC3S200 Spartan 3 FPGA over F 2 m using polynomial basis and generic m sizes from 163 up to 571 bits. An additional XC2V2000 Virtex 2 FPGA is attached to the custom platform due to size limitations.…”

Hardware Realization of High Speed Elliptic Curve Point Multiplication Using Precomputation Over Gf(p)

“…In our method, all the bits of k are applied simultaneously. Thereby shifting of the bits of k one at a time is avoided (Kumar, 2006;Schinianakis et al, 2009;Portilla et al, 2010;Jacob et al, 2013). This saves 't' clock cycles of time where 't' is the size of 'k' in bits.…”

Implementing Reconfigurable Wireless Sensor Networks: The Embedded Operating System Approach

“…A number of today's cryptographic implementations are not disposed to key varying capabilities even for the most optimized hardware-based cryptographic accelerator platforms. Examples of theses platforms are those realized on ASICS, intended to improve performance and minimize energy consumption (Portilla et al, 2010). These places restriction on scalability as predictions about future distribution have to be done before the distribution takes place.…”