Actual stresses around TSV in whole 3D-SiP under reflow or power ON/OFF thermal load

Kinoshita, Takahiro; Kawakami, Takashi; Wakamatsu, Takeshi; Shima, Shunpei; Matsumoto, Keiji; Kohara, Sayuri; Yamada, Fumiaki; Orii, Yasumitsu

doi:10.1109/impact.2012.6420223

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The Packaging and The Analysis Procedures1

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“…To simplify the FEM model, the equivalent equations derived in our earlier study [6][7] and the literature [8] are applied on the materials properties for the relative complex materials, such as the multi-layer PCB and the other thin layers inside the packaging. For global thermal simulation, an iteration scheme to determine the convective boundary conditions is performed, and the temperature results are compared with the measurements show in Figure 5 for verification.…”

Section: The Packaging and The Analysis Proceduresmentioning

confidence: 99%

Thermal and thermo-mechanical simulations on high power diode packaging for a typical power adapter

Tang

et al. 2013

2013 8th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT)

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To analyze thermal and thermo-stress behaviors of the diode packaging for high power applications, a global-local scheme through finite element simulations are performed in this study. To derive necessary boundary conditions and to verify the simulation results, thermal experiments are carried out for comparisons. New diode packaging designs are next proposed in this paper and their thermal resistance and structure stress are finally compared with the currently used ones to study the improvements.

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Section: The Packaging and The Analysis Proceduresmentioning

confidence: 99%