Active Redundant Hardware Architecture for Increased Reliability in FPGA-Based Nuclear Reactors Critical Systems

Farias, Marcos Santana; Nedjah, Nadia; Caravlho, Paulo Victor R. de

doi:10.1109/dsd51259.2020.00100

Cited by 1 publication

(1 citation statement)

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“…Furthermore, two additional Data monitoring Units for the output signals Q and !Q of another memory device were proposed. These two units use the concept of double modular redundancy (DMR) [17]- [19] with two XNOR gates and another two controlled switches that are responsible of detecting and correcting the effects of artificial and natural permanent faults. The idea is using an additional spare (D flip-flop), XNOR gates compares the output of a switch that follow the first XNOR with the output of the spare D flip flop, if its output equals (1) that indicates that no error is observed, and the switch will allow the output of a switch that follow the first XNOR to flow.…”

Section: The Proposed Research Methodsmentioning

confidence: 99%

Design and analysis of fault-tolerant sequential logic circuits for safety-critical applications

Khairullah,

Qassabbashi,

Kareem

2024

Bulletin EEI

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Safety-critical systems used in applications that demand high levels of dependability, efficiency, and fault-tolerance often use sequential logic circuits in its design and implementation. The safety-critical digital system typically uses latches, flip-flops, and other memory elements, which are prone to the effects of natural faults and single event upsets (SEUs) caused by radiation-induced effects. The faults can lead to subsystem failures due to the continuous advancement in the realization of the small size transistor. To design a reliable digital-based system, it is essential to develop new fault-tolerance approaches that are integrated into the design of sequential logic circuits. This work proposes a novel fault-tolerant approach based on the redundancy of sequential logic circuit, which consists of a variety of design components, D flip-flop storage elements linked to a fault injection unit, a duplicate modular redundancy, and data monitoring units with a switching circuit. The experimental simulation results using a five-state Markov chain analysis model prove that the proposed fault-tolerant system can achieve 0.99999998 for reliability of the fault detection coverage (C) which equal to 0.99999. Finally, we believe that using this new approach of fault-tolerance and redundancy would improve the dependability and reliability of next generation safety-critical applications.

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Section: The Proposed Research Methodsmentioning

confidence: 99%