Active Gate Driver for Crosstalk Suppression of SiC Devices in a Phase-Leg Configuration

An Investigation of Temperature-Sensitive Electrical Parameters for SiC Power MOSFETs

“…ΨB is the potential difference between the Fermi level and the intrinsic Fermi level, εSiC is the dielectric constant of silicon carbide, NA the doping density, q the electron charge and Eg(0) the band-gap energy at T=0 K. According to the datasheets and previously presented measurements [29,30] the threshold voltage is higher for Si MOSFETs however, both SiC and Si MOSFETs have a similar dVTH/dT. The effective mobility (µ) also reduces with temperature as a result of increased phonon scattering reducing the relaxation time between carrier-tolattice scattering events.…”

Overview of Silicon Carbide Technology: Device, Converter, System, and Application

“…Often, to avoid cross-talk, the high switchingspeed capability of SiC devices has to be compromised. To suppress cross-talk without sacrificing fast switching, several gate assist circuits were developed [102], [110]- [114]. Some are all transistor-based, which can be conveniently integrated with conventional gate driver IC [115], [116].…”

The Impact of Parasitic Elements on Spurious Turn-On in Phase-Shifted Full-Bridge Converters

“…According to the analysis in [15], in the soft-switching power converters, during the turn-off transient of the lower switch, the negative spurious voltage induced at the gatesource terminals of the upper switch may overstress the power device if its magnitude exceeds the maximum allowable negative gate voltage that is acceptable to the semiconductor device. For example, when Q 4 is turned off, there is a negative spurious voltage across the gate-source terminals of Q 3 .…”

“…In these studies, the spurious turn-on phenomena are mainly induced by the hard switching of transistors. High dv/dt during fast switching on the transient of one device affects the operating behavior of its complementary device [12]- [15]. Meanwhile, the high di/dt induces a negative voltage across the parasitic source inductor of the MOSFET, pulling down its source voltage [16], [17].…”