Acr: Application Aware Cache Replacement for Shared Caches in Multi-Core Systems

Abstract

Modern multi-core systems allow concurrent execution of different applications on a single chip. Such multicores handle the large bandwidth requirement from the processing cores by employing multiple levels of caches with one or two levels of private caches along with a shared last-level cache (LLC). In shared LLC, when applications with varying access behavior compete with each other for space, conventional single core cache replacement techniques can significantly degrade the system performance. In such scenarios, we need an efficient replacement policy for reducing the off-chip memory traffic as well as contention for the memory bandwidth. This paper proposes a novel Application-aware Cache Replacement (ACR) policy for the shared LLC. ACR policy considers the memory access behavior of the applications during the process of victim selection to prevent victimizing a low access rate application by a high-access rate application. \textcolor{red}{ It dynamically tracks the maximum lifetime of cache lines in shared LLC for each concurrent application and helps in efficient utilization of the cache space. Experimental evaluation of ACR policy for 4-core systems, with 16-way set associative 4MB LLC, using SPEC CPU 2000 and 2006 benchmark suites shows a geometric mean speed-up of 8.7% over the least recently used (LRU) replacement policy. We show that the ACR policy performs better than recently proposed thread-aware dynamic re-reference interval prediction (TA-DRRIP) and protecting distance based (PDP) techniques for various 2-core, 4-core and 8-core workloads.

A Survey of Techniques for Reducing Interference in Real-Time Applications on Multicore Platforms

“…Warrier [154] proposed an Application-aware Cache Replacement (ACR) policy. During cache replacement, the victim is selected, taking into account the hit-gap of the applications.…”

“…Proposals to reduce shared memory bus interference in realtime multicore systems are discussed below, divided into four fundamental categories: Memory Bandwidth Regulator, Application behavior aware policy Recency counters at each block AVG [154] Application-aware policy Taking into account the hit-gap of the applications AVG [156] (CA-RRIP) replacement algorithm Prediction of reuse of the block AVG Phased Execution Model, Offline Scheduling, and Hardware isolation. In addition, the main proposals that use interference reduction techniques without considering the predictability issue are discussed.…”