Achieving Programming Model Abstractions for Reconfigurable Computing

Andrews, Davıd L.; Sass, Ron; Anderson, E.; Agron, Jason; Peck, W.; Stevens, Jim; Baijot, Fabrice; Komp, Ed

doi:10.1109/tvlsi.2007.912106

Cited by 60 publications

(32 citation statements)

References 13 publications

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“…The authors in [32] discuss Hthreads, a mechanism to abstract the CPU/FPGA interface and seamlessly execute threaded applications on either using the PThreads programming model. They propose an abstract hardware/thread interface (HWTI) and support the compilation of data-parallel sections of code onto hardwired accelerators.…”

Section: Related Workmentioning

confidence: 99%

VThreads: A novel VLIW chip multiprocessor with hardware-assisted PThreads

Chouliaras

Stevens

Dwyer

2016

Microprocessors and Microsystems

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performance increase on synthetic benchmarks, x5 on a parallel Mandelbrot implementation, 66% better on a threaded JPEG implementation, 79% better on an edge-detection benchmark and~13% improvement on DES compared to the Leon3MP CMP. In the range of 2 to 8 cores VThreads demonstrates a post-route (statistical) power reduction between 65% to 57% at an area increase of 1.2%-10% for 1-8 cores, compared to a similarly-configured Leon3MP CMP. This combination of micro-architectural features, scalability, extensibility, hardware support for low-latency PThreads, power efficiency and area make the processor an attractive proposition for low-power, deeply-embedded applications requiring minimum OS support.

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Section: Related Workmentioning

confidence: 99%

VThreads: A novel VLIW chip multiprocessor with hardware-assisted PThreads

Chouliaras

Stevens

Dwyer

2016

Microprocessors and Microsystems

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“…While some of the works provide only a means of run-time management of HW accelerators [12][13][14][15][16][17], the others provide a proper support for HW tasks [18][19][20][21]. This is accomplished by supplying the HW tasks with a dedicated OS interface.…”

Section: Related Researchmentioning

confidence: 99%

“…It is implemented as an extension for Linux and eCos [10] and utilizes a unified POSIX-compliant API for SW and HW tasks. HThreads [21] presents another OS which is a Linux extension; thus it is also based on a POSIX-compliant API. An interesting aspect of that work is architecture of the OS interface for HW tasks which gives them support for dynamic memory allocation and recursive execution of functions.…”

Section: Related Researchmentioning

confidence: 99%

Rainbow: An Operating System for Software-Hardware Multitasking on Dynamically Partially Reconfigurable FPGAs

Jozwik

Honda

Edahiro

et al. 2013

International Journal of Reconfigurable Computing

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Dynamic Partial Reconfiguration technology coupled with an Operating System for Reconfigurable Systems (OS4RS) allows for implementation of a hardware task concept, that is, an active computing object which can contend for reconfigurable computing resources and request OS services in a way software task does in a conventional OS. In this work, we show a complete model and implementation of a lightweight OS4RS supporting preemptable and clock-scalable hardware tasks. We also propose a novel, lightweight scheduling mechanism allowing for timely and priority-based reservation of reconfigurable resources, which aims at usage of preemption only at the time it brings benefits to the performance of a system. The architecture of the scheduler and the way it schedules allocations of the hardware tasks result in shorter latency of system calls, thereby reducing the overall OS overhead. Finally, we present a novel model and implementation of a channel-based intertask communication and synchronization suitable for software-hardware multitasking with preemptable and clock-scalable hardware tasks. It allows for optimizations of the communication on per task basis and utilizes point-to-point message passing rather than shared-memory communication, whenever it is possible. Extensive overhead tests of the OS4RS services as well as application speedup tests show efficiency of our approach.

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“…Although flexible, RPC mechanisms are typically implemented using heavyweight interrupt and exception mechanisms. We developed the hthreads operating system to direclty resolve heterogeneous incompatibilities and provide a precise real-time performance envelope for embedded systems [6,7]. Hthreads resolved ISA incompatibilities by providing a system of processor-agnostic (ISA-neutral) thread management, scheduling, and synchronization services implemented as hardware cores.…”

Section: Hthreads Heterogeneous Microkernelmentioning

confidence: 99%

“…Hthreads resolved ISA incompatibilities by providing a system of processor-agnostic (ISA-neutral) thread management, scheduling, and synchronization services implemented as hardware cores. Figure 4 shows the 4 major hardware cores that comprise the backbone of the hthreads system: the Thread Manager, Scheduler, Synchronization Manager, and Condition Variables [6,7]. This modular partitioning breaks up the traditional monolithic kernel structure allowing separation of concerns between different OS service cores.…”

Section: Hthreads Heterogeneous Microkernelmentioning

confidence: 99%

Automating the design of mLUT MPSoPC FPGAs in the cloud

Cartwright

Fahkari

et al. 2012

22nd International Conference on Field Programmable Logic and Applications (FPL)

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Modern platform FPGAs are over the million-LUT level, large enough to support complete heterogeneous Multiprocessor System-On-Chips (MPSoCs). Constructing systems with 10's of processors is currently feasible using existing manual methods within vendor-specific CAD tools. However these manual, by-hand, approaches will not be feasible for constructing future systems with 100's to 1,000's of processors. Instead, new automated system assembly approaches will be required to handle these levels of system complexity and diversity. In this paper we present a new automated design flow for creating such next generation heterogeneous MPSoCs. An integral part of the MPSoPC system created is the inclusion of a general purpose PThreadscompliant HW/SW co-designed operating system and heterogeneous compiler. Our design flow has been placed in the cloud and is freely accessible across the Internet.

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Achieving Programming Model Abstractions for Reconfigurable Computing

Cited by 60 publications

References 13 publications

VThreads: A novel VLIW chip multiprocessor with hardware-assisted PThreads

VThreads: A novel VLIW chip multiprocessor with hardware-assisted PThreads

Rainbow: An Operating System for Software-Hardware Multitasking on Dynamically Partially Reconfigurable FPGAs

Automating the design of mLUT MPSoPC FPGAs in the cloud

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