Accurate Performance Evaluation of Jitter-Power FOM for Multiplying Delay-Locked Loop

Liu, Yueduo; Bao, Rongxin; Zhu, Zihao; Yang, Shiheng; Zhou, Xiong; Yin, Jun; Mak, Pui-In; Li, Qiang

doi:10.1109/tcsi.2021.3115798

Cited by 1 publication

(1 citation statement)

References 40 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…However, a BB-ILCM mainly differs from the DPLL due to two challenges when building up an explicit model: (1) multi-rate operation in the injected DCO and (2) the nonlinear BBPD. To describe the injection-locked oscillator, [2] presents a phase-realignment model to derive loop transfer functions, which has been extensively adopted for frequency domain analysis [3]- [5], [7]- [9], [13]. However, this model uses the continuous-time approximation of injection-locking.…”

Section: Introductionmentioning

confidence: 99%

Analysis and Design of Digital Injection-Locked Clock Multipliers Using Bang-Bang Phase Detectors

Shi

2022

IEEE Trans. Circuits Syst. I

View full text Add to dashboard Cite

The analysis of injection-locked clock multipliers (ILCMs) using bang-bang phase detectors (BBPDs) is challenging due to the nonlinear BBPD and the multi-rate injected oscillator. This paper presents an explicit analysis of digital ILCMs using BBPDs and proposed an intuitive approach to optimizing parameters with given noise sources. A time-domain analysis in the single-clock domain is presented to solve the closed-form expression of jitter in the ILCM. The proposed approach exhibits good consistency with simulations, for various design parameters and noise cases. With the predicted inputreferred jitter, the equivalent BBPD gain is resolved to derive the frequency-domain noise transfer functions in concise forms. To achieve the desired performance with given specifications, recommended design procedures are summarized based on the proposed analysis and verified by simulations.

show abstract

Section: Introductionmentioning

confidence: 99%

Analysis and Design of Digital Injection-Locked Clock Multipliers Using Bang-Bang Phase Detectors

Shi

2022

IEEE Trans. Circuits Syst. I

View full text Add to dashboard Cite

show abstract

Accurate Performance Evaluation of Jitter-Power FOM for Multiplying Delay-Locked Loop

Cited by 1 publication

References 40 publications

Analysis and Design of Digital Injection-Locked Clock Multipliers Using Bang-Bang Phase Detectors

Analysis and Design of Digital Injection-Locked Clock Multipliers Using Bang-Bang Phase Detectors

Contact Info

Product

Resources

About