Accelerating method of moments based package‐board 3D parasitic extraction using FPGA

Abstract

In this article, a Field Programmable Gate Array (FPGA)‐based hardware accelerator for 3D electromagnetic extraction, using Method of Moments (MoM) is presented. As the number of nets or ports in a system increases, leading to a corresponding increase in the number of right‐hand‐side (RHS) vectors, the computational cost for multiple matrix‐vector products presents a time bottleneck in a linear‐complexity fast solver framework. In this work, an FPGA‐based hardware implementation is proposed toward a two‐level parallelization scheme: (i) matrix level parallelization for single RHS and (ii) pipelining for multiple‐RHS. The method is applied to accelerate electrostatic parasitic capacitance extraction of multiple nets in a Ball Grid Array (BGA) package. The acceleration is shown to be linearly scalable with FPGA resources and speed‐ups over 10× against equivalent software implementation on a 2.4 GHz Intel Core i5 processor is achieved using a Virtex‐6 XC6VLX240T FPGA on Xilinx's ML605 board with the implemented design operating at 200 MHz clock frequency. © 2016 Wiley Periodicals, Inc. Microwave Opt Technol Lett 58:776–783, 2016