Accelerating GOR Algorithm Using CUDA

Abstract

Protein secondary structure prediction is very important for its molecular structure. GOR algorithm is one of the most successful computational methods and has been widely used as an efficient analysis tool to predict secondary structure from protein sequence. However, the running time is unbearable with sharp growth in protein database. Fortunately, CUDA (Compute Unified Device Architecture) provides a promising approach to accelerate secondary structure prediction. Therefore, we propose a fine-grained parallel implementation to parallelize GOR-IV package for accelerating protein secondary structure prediction, in which each amino acid would be assigned to one single CUDA thread, hence protein secondary structure prediction would be parallelized by many CUDA threads simultaneously, and constant cache is resorted to cache parameter table. Experimental results show a speedup factor is more than 173X over original GOR-IV version.

Computational Challenge of Fractional Differential Equations and the Potential Solutions: A Survey

“…The new graphics processing unit (GPU) has fast shared memory and slow memory. Reusing the data in shared memory is a key point to improve the performance of GPU applications [105][106][107][108][109]. A very useful optimization is presented for fractional derivative [69,110].…”

How to Transfer Strided Data into Accelerator

“…However, how to make best use of accelerator resources is still a challenge. Most research work is focused on maximizing utilization of accelerator cores by exploiting millions of concurrent threads, 7,[10][11][12][13] while few works are interested in data transfer into accelerators and fewer works have referred to non-contiguous data transfer with special respect to strided data transfer. However, non-contiguous chunks of data, especially for strided data, are widely applied to real-life scenarios, such as regions-of-interest (ROI) coding and critical component of dataset duplication for reliability.…”

“…However, it is more expensive to transfer data into CUDA memory. [10][11][12][13][14][15][16][17] Therefore, minimizing data transfer is proposed for GPU clusters, 18 and asynchronous transfer is also resorted to in porting FFT into CUDA. 11,[19][20][21] But, the above techniques are proposed for contiguous chunks of data transfer and difficult to extend into strided data in practice.…”