Accelerating Arithmetic Kernels with Coherent Attached FPGA Coprocessors

Giefers, Heiner; Polig, Raphael; Hagleitner, Christoph

doi:10.7873/date.2015.1123

Cited by 17 publications

(13 citation statements)

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“…FPGA accelerators are promising to enhance overall system performance with low power consumption. Past works [28ś32, 49,57,74,87,90,92,94,106] show that FPGAs can be employed efectively for a wide range of applications. FPGAs provide a unique combination of lexibility and performance without the cost, complexity, and risk of developing custom application-speciic integrated circuits (ASICs).…”

Section: Related Workmentioning

confidence: 99%

Accelerating Weather Prediction Using Near-Memory Reconfigurable Fabric

Singh

Diamantopoulos

Gómez-Luna

et al. 2022

ACM Trans. Reconfigurable Technol. Syst.

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Ongoing climate change calls for fast and accurate weather and climate modeling. However, when solving large-scale weather prediction simulations, state-of-the-art CPU and GPU implementations suffer from limited performance and high energy consumption. These implementations are dominated by complex irregular memory access patterns and low arithmetic intensity that pose fundamental challenges to acceleration. To overcome these challenges, we propose and evaluate the use of near-memory acceleration using a reconfigurable fabric with high-bandwidth memory (HBM). We focus on compound stencils that are fundamental kernels in weather prediction models. By using high-level synthesis techniques, we develop NERO, an FPGA+HBM-based accelerator connected through OCAPI (Open Coherent Accelerator Processor Interface) to an IBM POWER9 host system. Our experimental results show that NERO outperforms a 16-core POWER9 system by 5.3 × and 12.7 × when running two different compound stencil kernels. NERO reduces the energy consumption by 12 × and 35 × for the same two kernels over the POWER9 system with an energy efficiency of 1.61 GFLOPS/Watt and 21.01 GFLOPS/Watt. We conclude that employing near-memory acceleration solutions for weather prediction modeling is promising as a means to achieve both high performance and high energy efficiency.

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Section: Related Workmentioning

confidence: 99%

Accelerating Weather Prediction Using Near-Memory Reconfigurable Fabric

Singh

Diamantopoulos

Gómez-Luna

et al. 2022

ACM Trans. Reconfigurable Technol. Syst.

Self Cite

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“…New programming abstractions are improving adoption by simplifying the FPGA development process [10,43]. Cache-coherent FPGAs have been previously used to accelerate Fast Fourier Transform [27] and to provide a prototyping platform for innovation in the memory subsystem of POWER servers [76]. Seminal distributed shared memory work [9,12,45,65,66] uses software techniques based on virtual memory or hardware techniques based on cache coherence.…”

Section: Related Workmentioning

confidence: 99%

Project PBerry

Calciu

Puddu

Kolli

et al. 2019

Proceedings of the Workshop on Hot Topics in Operating Systems

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Recent research efforts propose remote memory systems that pool memory from multiple hosts. These systems rely on the virtual memory subsystem to track application memory accesses and transparently offer remote memory to applications. We outline several limitations of this approach, such as page fault overheads and dirty data amplification. Instead, we argue for a fundamentally different approach: leverage the local host's cache coherence traffic to track application memory accesses at cache line granularity. Our approach uses emerging cache-coherent FPGAs to expose cache coherence events to the operating system. This approach not only accelerates remote memory systems by reducing dirty data amplification and by eliminating page faults, but also enables other use cases, such as live virtual machine migration, unified virtual memory, security and code analysis. All of these use cases open up many promising research directions. CCS Concepts • Hardware → Hardware accelerators; • Software and its engineering → Distributed memory.

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“…A 5× gain in energy efficiency has been demonstrated for FPGA-based, FFT acceleration when compared to an optimized parallel software FFT running on a 12-core CPU [12]. Microsoft's FPGA-based Catapult data center infrastructure demonstrated a 95% improvement in ranking throughput in a production search infrastructure at comparable latency to a software only, with only a 10% increase in power consumption [13].…”

Section: Background Workmentioning

confidence: 99%

“…The work makes use of commercially available general purpose hardware rather than specialised system architectures developed by vendors for their data centres [12] [13] and can be incorporated easily into existing small to medium scale data centres and near the edge computing nodes without any specific interface requirements. To verify validity, we have provided integrated system results on the lowest speed grade hardware using real-time data as compared to work providing simulation or theoretically estimated results or only logic power consumption numbers [31] [23] [24].…”

Section: Background Workmentioning

confidence: 99%

NanoStreams: A Microserver Architecture for Real-Time Analytics on Fast Data Streams

Minhas

Russell

Kaloutsakis

et al. 2018

IEEE Trans. Multi-Scale Comp. Syst.

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Abstract-Ever increasing power consumption has created great interest in energy-efficient microserver architectures but they lack the computational, networking and storage power necessary to cope with real-time data analytics. We propose NanoStreams, an integrated architecture comprising an ARM-based microserver, coupled via a novel, low latency network interface, Nanowire, to a Analytics-on-Chip architecture implemented on Field Programmable Gate Array (FPGA) technology; the architecture comprises ARM cores for performing low latency transactional processing, integrated with programmable, energy efficient Nanocore processors for high-throughput streaming analytics. The paper outlines the complete system architecture, hardware level detail, compiler, network protocol, and programming environment. We present experiments with an industrial workload from the financial services sector, comparing a state-of-the-art server based on Intel Sandy Bridge processors, an ARM based Calxeda ECS-1000 microserver and ODROID XU3 node, with the NanoStreams microserver architecture. For end-to-end workload, the NanoStreams microserver achieves energy savings up to 10.7×, 5.87× and 5× compared to the Intel server, Calxeda microserver and ODROID node respectively.

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Accelerating Arithmetic Kernels with Coherent Attached FPGA Coprocessors

Cited by 17 publications

References 0 publications

Accelerating Weather Prediction Using Near-Memory Reconfigurable Fabric

Accelerating Weather Prediction Using Near-Memory Reconfigurable Fabric

Project PBerry

NanoStreams: A Microserver Architecture for Real-Time Analytics on Fast Data Streams

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