A Θ( √ n)-depth quantum adder on the 2D NTC quantum computer architecture

Abstract

In this work, we propose an adder for the 2D NTC architecture, designed to match the architectural constraints of many quantum computing technologies. The chosen architecture allows the layout of logical qubits in two dimensions and the concurrent execution of one-and two-qubit gates with nearest-neighbor interaction only. The proposed adder works in three phases. In the first phase, the first column generates the summation output and the other columns do the carry-lookahead operations. In the second phase, these intermediate values are propagated from column to column, preparing for computation of the final carry for each register position. In the last phase, each column, except the first one, generates the summation output using this column-level carry. The depth and the number of qubits of the proposed adder are Θ( √ n) and O(n), respectively. The proposed adder executes faster than the adders designed for the 1D NTC architecture when the length of the input registers n is larger than 58.Keywords: quantum arithmetic algorithms, quantum circuit, depth lower bound, adder, 2D NTC quantum computer architecture Communicated by: to be filled by the Editorial IntroductionQuantum computers have been proposed to exploit the exotic properties of quantum mechanics for information processing. Among many potential uses, two quantum algorithms have received the bulk of the attention. One is Shor's large number factoring algorithm [1], and the other is Grover's unstructured database search algorithm [2], though there has also been much progress recently on other algorithms [3,4,5]. Quantum algorithms are often shown to a A two-page short abstract was presented at AQIS 2010. This version includes all details of design and analysis of the proposed adder. b Corresponding Author, bschoi3@gmail.com c rdv@sfc.wide.ad.jp 1 2 An Θ( √ n)-depth Quantum Adder on a 2D NTC Quantum Computer Architecture be more efficient than classical ones by analyzing the number of queries to an oracle. However, for a more exact performance analysis, we need to analyze the quantum algorithms in terms of the detailed quantum circuits necessary to implement them. Among many circuits, as in classical computation, a core set of subroutines whose behavior will strongly impact the performance of the overall algorithm is arithmetic, hence we focus on the adder in this work.Numerous quantum addition circuits have been proposed using abstract models of the computer itself. The basic elementary quantum arithmetic operations including addition

Linear and Logarithmic Time Compositions of Quantum Many-Body Operators

“…For many-body operators spanning much of the graph, the spanning tree depth will determine how many steps it will take to link distant qubits in the collective many-body operator (intermediary unneeded qubits can be removed in the subsequent step). Thus, we expect the circuit depth will scale as O(log(n)) when the depth of the spanning tree is O(log(n)), as in [49][50][51][52][53][54][55], and O( d √ n) scaling for d-dimensional, nearest-neighbour architectures being expected [56][57][58].…”

Determining the minimal number of swap gates for multi-dimensional nearest neighbor quantum circuits

“…in [16] , have been presented, automatic approaches for SWAP gate insertion are hardly available yet. To the best of our knowledge, only the approach recently proposed in [17] exists.…”

“…Nevertheless, the devel opment of respective synthesis solutions ensuring near est neighbor-compliance for these architectures are just at the beginning. To the best of our knowledge, only hand-made solutions such as [16] or the approach recently proposed in [17] exists yet. However, these solutions are of heuristic nature and, hence, no exact results on 2D and multi-dimensional nearest neighbor quantum circuits have been obtained thus far.…”

Constant-Factor Optimization of Quantum Adders on 2D Quantum Architectures

“…In the first phase, after using a half-adder and √ n − 1 full-adders output carries c 2 , · · · c √ n+1 will be available. It is done in 32 √ n − 17 unit-time steps in [19]. The carry-lookahead addition in other columns produces…”

“…for 1 ≤ k ≤ √ n − 1 and 1 ≤ j ≤ √ n. After computing g i and p i values in all columns in parallel, G[i, j] and P [i, j] are computed in serial based on (3) and (4) for 1 ≤ k ≤ √ n − 1, and 2 ≤ j ≤ √ n Table 1: Basic blocks in 2D adder [19] and their depths in terms of unit-cost gates. The last term (i.e., 3) in total depth represents 2 NOTs and one CNOT gate used to construct the final output in [19].…”