A Wireless Power Management Unit with a Novel Self-Tuned LDO for System-On-Chip Sensors

Abstract

A wireless power management unit is presented in this work. The system size of 0.4mm 2 with the low power consumption of 87µW allow it to be applied in implantable biomedical applications and ex-vivo systems. The proposed system optimises the conventional slew-rate detection low dropout (LDO) circuit by using a self-tuned controlling block that reduces the response time to 100ns. The static power required for this LDO is reduced to 2µW. The band gap reference (BGR) is designed with a high power supply rejection ratio (PSRR) of 60dB at 100kHz, along with an output reference voltage deviation of 1mV, to deal with the power supply ripple caused by the load shift keying (LSK). The RF power is transmitted at 433MHz and the internal power management circuit is able to provide a 1.4V stable DC supply for a front end on-chip sensor.

Low quiescent current LDO with FVF-based PSRR enhanced circuit for EEG recording wearable devices

“…LDOs play a crucial role in a wide range of applications, such as driving noise-sensitive analog, RF, mixed-signal, and digital module interfaces. [9][10][11][12][13][14] In many cases, power supply circuits use LDOs and switch-mode power supplies (SMPSs) connected in series to optimize their efficiency and achieve a low noise output voltage. Therefore, the power supply rejection ratio (PSRR) characteristic of the LDO is crucial to suppress the output voltage ripple of the SMPS.…”