A Wideband Receiver for Multi-Gbit/s Communications in 65 nm CMOS

Vecchi, Federico; Bozzola, Stefano; Temporiti, Enrico; Guermandi, Davide; Pozzoni, M.; Repossi, Matteo; Cusmai, Marco; Decanis, Ugo; Mazzanti, Andrea; Svelto, F.

doi:10.1109/jssc.2010.2100251

Cited by 65 publications

(10 citation statements)

References 22 publications

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“…Several techniques to enhance the gain-bandwidth product at mm-Wave frequencies have been successfully proposed recently (among which [4,5]), and in principle all of them could be applied in the E-Band as well. The key aspect of these designs is the broadband inter-stage matching network.…”

Section: Ku Leuven Leuven Belgiummentioning

confidence: 99%

20.10 A 68.1-to-96.4GHz variable-gain low-noise amplifier in 28nm CMOS

Vigilante

Reynaert

2016

2016 IEEE International Solid-State Circuits Conference (ISSCC)

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Section: Ku Leuven Leuven Belgiummentioning

confidence: 99%

20.10 A 68.1-to-96.4GHz variable-gain low-noise amplifier in 28nm CMOS

Vigilante

Reynaert

2016

2016 IEEE International Solid-State Circuits Conference (ISSCC)

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“…The drain-bulk capacitance of M2 is resonated out by the primary spiral of TF1 at 60 GHz. Instead of matching the output impedance of the first stage and the input impedance of the second stage to 50 Ω separately, a π-type network consisting of L1, L2, and C2 is employed for the interstage coupling [2], and the gain is boosted. As the 44-μm M1 and M2 introduce relatively large parasitic capacitance, the needed inductances L1 and L2 in the interstage π-type network are only 67 and 60 pH, respectively.…”

Section: B High-gain Driver Stagesmentioning

confidence: 99%

A 60-GHz CMOS Dual-Mode Power Amplifier With Efficiency Enhancement at Low Output Power

Kuang

Chi

Jia

et al. 2015

IEEE Trans. Circuits Syst. II

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A 60-GHz dual-mode power amplifier (PA) with efficiency enhancement at low output power in 65-nm bulk CMOS is presented. The PA consists of two cascaded common-source driver stages and one transformer-based output stage. The dual-mode output stage is reconfigured into a stacked-transistor amplifier with a 2.5-V power supply in high-power (HP) mode for highpower-handling capability and a cascode amplifier with a 1.2-V power supply in low-power (LP) mode for efficiency enhancement at low output power. The measured results show that the presented PA achieves a small-signal gain of 23.5/21.3 dB, a saturated output power value of 17.6/11.4 dBm, a 1-dB output power value of 12.5/4.7 dBm, and a peak power-added-efficiency (PAE) value of 20.4%/13.3% in the HP/LP mode at 60 GHz, respectively. The PAE at 10-dBm output power is improved by 2.8x (10.6% versus 3.8%) by utilizing the LP mode compared with the HP-mode-only PA. The total chip area is 0.68 mm × 0.35 mm, including pads.Index Terms-CMOS, dual mode, efficiency enhancement, millimeter wave, power amplifier (PA), stacked transistor.

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“…As the modern complementary metal–oxide–semiconductor (CMOS) technology scales down into the nanometre scale, the development of CMOS millimetre‐wave (mm‐wave) integrated circuits have drawn a lot of interest in the world [1–8]. However, the design of CMOS mm‐wave integrated circuits is still not an easy task compared with the design of conventional radio‐frequency (RF) circuits.…”

Section: Introductionmentioning

confidence: 99%

Simple and robust self‐healing technique for millimetre‐wave amplifiers

Jia

Chi

Kuang

et al. 2016

IET Circuits, Devices & Systems

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A simple and robust self-healing technique for millimetre-wave (mm-wave) amplifiers is proposed. The selfhealing technique can correct the operation frequency shifting of the amplifier (including its input and output impedance matching shifting) due to process, voltage, and temperature variations and modelling inaccuracy. A mmwave amplifier with digitally controlled artificial dielectric transmission lines as fine frequency tuning components and an on-chip power detector as the frequency shifting detector has been implemented in 65 nm complementary metaloxide-semiconductor to verify the effectiveness of the technique. The operating frequency of five amplifier chips is calibrated by running the self-healing algorithm on a field-programmable gate array development board. On average, the gain of the amplifier is improved by 2.60 dB from 13.66 to 16.26 dB and the input matching is improved by 12.78 dB from −4.89 to −17.67 dB at 56 GHz after the proposed self-healing procedure.

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A Wideband Receiver for Multi-Gbit/s Communications in 65 nm CMOS

Cited by 65 publications

References 22 publications

20.10 A 68.1-to-96.4GHz variable-gain low-noise amplifier in 28nm CMOS

20.10 A 68.1-to-96.4GHz variable-gain low-noise amplifier in 28nm CMOS

A 60-GHz CMOS Dual-Mode Power Amplifier With Efficiency Enhancement at Low Output Power

Simple and robust self‐healing technique for millimetre‐wave amplifiers

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