A Wideband Differential Low-Noise-Amplifier With IM3 Harmonics and Noise Canceling

Lee, Hankyu; Chung, Taeyoung; Seo, Heesong; Choi, Injun; Kim, Bumman

doi:10.1109/lmwc.2014.2365733

Cited by 44 publications

(20 citation statements)

References 8 publications

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“…Table I that the noise performance is a little worse, but the IIP3 and IIP2 are a lot higher. Even though this work is a single-ended type, the higher IIP2 is measured than [9], which is a differential-to-differential one, thanks to the complementary CMOS parallel push-pull structure. This work has been fabricated in a 65 nm CMOS process and the chip photograph is shown in Fig.…”

Section: Measurementmentioning

confidence: 98%

A Wideband CMOS Noise-Canceling Low-Noise Amplifier With High Linearity

Chung

Lee

Jeong

et al. 2015

IEEE Microw. Wireless Compon. Lett.

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This letter presents a wideband noise-canceling LNA focusing on canceling IMD2 and IMD3. By using a complementary CMOS parallel push-pull structure, the IMD2 is cancelled. The modified noise-canceling circuit properly suppresses the IMD3. Although the optimum canceling points for the noise and distortions are different, the noise figure is not degraded by the choice. The LNA implemented in a 65 nm CMOS process delivers an IIP2 of 25 dBm, an IIP3 of 5.5 dBm with a power gain of 13 dB and an noise figure of 2.1-3.5 dB in a frequency range from 0.1 to 1.6 GHz. The power consumption is 20.8 mW at 1.2 V and the chip area is only .Index Terms-IM2 distortion-canceling, IM3 distortion-canceling, noise-canceling, wideband low-noise amplifier.

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Section: Measurementmentioning

confidence: 98%

A Wideband CMOS Noise-Canceling Low-Noise Amplifier With High Linearity

Chung

Lee

Jeong

et al. 2015

IEEE Microw. Wireless Compon. Lett.

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“…A feedforward noise-cancelling (FFNC) technique has been reported [15][16][17], but it requires a common-source stage that increases the total dc power consumption. Broadband differential LNAs with cross-coupled transistor pairs have been proposed [18][19][20], and have reduced the NF by 0.3-0.5 dB [10]. However, the real receivers of these LNAs require an extra input balun circuit because of the single-end inputs of their antennas.…”

Section: Noise-reduction Lnamentioning

confidence: 99%

Compact composite noise‐reduction LNA for UWB WPAN and WBAN applications

Lin

Liang

Tarng

et al. 2018

IET Microwaves, Antennas & Propagation

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An ultra‐wideband (UWB) low‐noise amplifier (LNA) implemented using 180 nm complementary metal–oxide–semiconductor technology is presented for wireless personal area network (WPAN) and wireless body area network (WBAN). Increasing the resistance of the substrate resistor RB reduces the noise factor. When additional substrate resistors and a composite feedback topology are employed, the proposed LNA can achieve both a 1.4 dB reduction of the noise figure (NF) and a 4 dB enhancement in power gain (PG). Over the operating frequency range from 3.1 to 4.8 GHz, the LNA achieves a maximum PG of 14.5 dB, a minimum NF of 1.5 dB, and an input return loss of <10 dB. The measured current consumption is 3 mA with a 1.5 V supply voltage. The active chip area is 0.008 mm2. The proposed 3.1–4.8 GHz LNA has a superior NF, smaller active area, and the lowest dc power consumption compared with devices reported in the literature.

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“…Other recently published state‐of the‐art wideband LNAs are also included for comparison with a figure of merit (FOM) equation. The proposed LNA has comparable high gain and low NF with, but outperforms them well in IIP3. Generally, the best figure of merit is achieved in our design but with much lower power consumption than that in the work by Kim and Donggu …”

Section: Resultsmentioning

confidence: 95%

A wideband common‐gate CMOSLNA employing complementary MGTR technique

Guo

Chen

2017

Micro & Optical Tech Letters

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A wideband capacitor cross‐coupled common‐gate low‐noise amplifier (CGLNA) featured with high gain, low noise, and enhanced linearity is proposed. The linearity is enhanced by complementary multi‐gated transistor (CMGTR) technique. The bulk voltage and scaling size of auxiliary transistors are tuned to shift the distortion coefficients, compensating the nonlinearity of main transistors. In addition, the current reuse by stacked PMOS/NMOS configuration reduces power consumption while guaranteeing the input matching. A prototype is implemented in a 0.18 μm RF CMOS process. The measurement shows a maximal voltage gain of 19.5 dB, an average noise figure (NF) of 2.1 dB, and an input‐referred third‐order intercept point (IIP3) of 8.3–10 dBm over a 3 dB bandwidth of 0.2–1.6 GHz, respectively. It consumes only 3.5 mA from a 2.2 V supply.

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A Wideband Differential Low-Noise-Amplifier With IM3 Harmonics and Noise Canceling

Cited by 44 publications

References 8 publications

A Wideband CMOS Noise-Canceling Low-Noise Amplifier With High Linearity

A Wideband CMOS Noise-Canceling Low-Noise Amplifier With High Linearity

Compact composite noise‐reduction LNA for UWB WPAN and WBAN applications

A wideband common‐gate CMOSLNA employing complementary MGTR technique

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