A wideband 5 GHz digital PLL using a low-power two-step time-to-digital converter

Hamza, Ali; Ibrahim, Sameh A.; El-Nozahi, Mohamed; Dessouky, Mohamed

doi:10.1109/icecs.2015.7440315

Cited by 2 publications

(3 citation statements)

References 12 publications

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“…Time amplifiers (TAs) are widely used for time interval measurements in time-to-digital converters (TDCs), time-offlight (TOF) [1]- [5], analog-to-digital converters [6] [7], and all-digital phase-locked loop (ADPLL) [8]- [11] applications. TAs are used for built-in jitter measurement [12], amplifying the time interval of the jitter and enhancing the resolution.…”

Section: Introductionmentioning

confidence: 99%

“…A CMOS TA [21] achieves dynamic gain, and controls the tail current to yield an output pulse range that spans from a few hundred femtoseconds to a few hundred picoseconds. The architecture of an SR latch-based TA consists of two SR latches [11], input delay T OFF , and an output capacitor. The extending time of the The associate editor coordinating the review of this manuscript and approving it for publication was Wei Liu.…”

Section: Introductionmentioning

confidence: 99%

“…Figures 2(a) and (b) show an SR latch-based TA scheme [11] along with the timing diagram for T IN vs. T OUT , which is obtained by…”

Section: Introductionmentioning

confidence: 99%

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All-Digital Mismatched Calibrator and Compensator for SR Latch-Based Variable-Gain Time Amplifier

Chao¹,

Lai²,

Hsu³

2020

IEEE Access

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Two major mismatches in SR latch-based time amplifiers (TA) include input skew, which causes gain imbalance, and loading mismatch, which reduces gain accuracy. Accordingly, we propose an all-digital mismatched self-calibrator and compensator for an SR latch-based variable-gain TA. Tunable matching cells and variable capacitors are built into TAs to compensate for input skew (gain imbalance) and loading mismatch (gain inaccuracy). To ensure that the proposed calibration works efficiently and accurately, the TA must provide at least high and low gains where the low gain calibrates the most significant bit (MSB) and the high gain calibrates the least significant bit (LSB). This self-calibrator costs 4375 gates, and the power consumption is 2.8 mA for the TA gain with 2 and 3.2 mA for the TA gain with 16 at a sampling rate of 10 MHz. INDEX TERMS Mismatch calibration, self-calibration, time amplifier.

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