2018 IEEE International Symposium on Circuits and Systems (ISCAS) 2018
DOI: 10.1109/iscas.2018.8350995
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A Wide-Range All-Digital Delay-Locked Loop for Double Data Rate Synchronous Dynamic Random Access Memory Application

Chih‐Wei Tsai
1
,
Yu‐Ting Chiu
2
,
Yo-Hao Tu
3
et al.
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Cited by 7 publications
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