A W-band stacked FET power amplifier with 17 dBm P&lt;inf&gt;sat&lt;/inf&gt; in 45-nm SOI MOS

Jayamon, Jefy A.; Agah, Amir; Hanafi, Bassel; Dabag, Hayg-Taniel; Buckwalter, James F.; Asbeck, P.M.

doi:10.1109/rws.2013.6486706

Cited by 7 publications

(2 citation statements)

References 5 publications

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“…Low resistivity of substrate, low breakdown voltage of transistor, serious parasitic effect and skin effect in millimeter wave band make it a challenge to realize high output power PA based on advanced CMOS technology [8,9,10,11]. In recent years, varieties of researches focus on improving the output power by series or parallel power combining technique [12,13,14,15,16,17,18,19,20,21,22,23].…”

Section: Introductionmentioning

confidence: 99%

A Ka-band 23dBm power amplifier based on 4-way parallel-series power combiner with loaded capacitors in 65-nm CMOS

Zhang²,

Lv³

et al. 2021

IEICE Electron. Express

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This paper presents a Ka-band 4-way combining power amplifier (PA) implemented in 65nm CMOS process. A T-type power combiner with loaded capacitors is proposed, which is cascaded with transformer-based power combiner to form a hybrid power combiner. The hybrid combiner can combine the output power of 4-way differential PAs into one channel compactly, and makes them achieve optimal load matching. The measured saturation output power (Psat), output 1dB compression point (OP1dB) and maximum power added efficiency (PAEmax) are 23dBm, 18.9dBm and 27% at 35GHz respectively. It achieves a 3dB bandwidth of 30.7GHz-38.5GHz within a core area of 0.26mm 2 .

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Section: Introductionmentioning

confidence: 99%

A Ka-band 23dBm power amplifier based on 4-way parallel-series power combiner with loaded capacitors in 65-nm CMOS

Zhang²,

Lv³

et al. 2021

IEICE Electron. Express

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“…However, insertion loss (IL) of the PA's output combining network, itself a pivotal if not the most critical part for this class-A PA design, has not been thoroughly investigated. Therefore, we intend to focus on the specific task of analysing the output combining network's IL in this paper, which will be useful in the design of other millimetre-wave CMOS PAs [7][8][9][10].…”

Section: Introductionmentioning

confidence: 99%

IL analysis for 8‐way power combining network in 77–110 GHz 40 nm‐complementary metal–oxide–semiconductor PA design

Huang¹,

Wu²,

Wu³

et al. 2019

IET Circuits, Devices & Systems

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In this study, the authors will investigate the insertion loss (IL) of the broadband 8-way power combiner used in their millimetre-wave power amplifier (PA) design. By treating this combiner as impedance transformer under resistor-capacitor (RC)loading condition, both the characteristic impedance and electrical length of the constituting metal lines can be obtained, where the much shorter line length suggests wider bandwidth and lower IL. However, proper loss analysis must take into account the multi-reflection of voltage wave along these mismatched transmission lines, i.e. the use of the power attenuation expression e −2αL is just not accurate enough. With their derived equations, it shows that the IL of their proposed 8-way combiner can be as low as 0.92 dB at 94 GHz, which is much smaller than the 1.5 dB for the conventional quarter-wavelength combiner. Mathematics for the IL of the drain-bias shunt stub and the output DC-blocking capacitor has also been derived. As a demonstration, a 77-110 GHz 40 nm-complementary metal-oxide-semiconductor PA made of cascode transistors is then designed that has more than 18 dB gain, and its OP1 dB is around 13 dBm across the whole frequency range.

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Stacked-transistor mm-wave power amplifiers

Asbeck¹,

Krishnaswamy²

2016

Mm-Wave Silicon Power Amplifiers and Transmitters

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A W-band stacked FET power amplifier with 17 dBm P<inf>sat</inf> in 45-nm SOI MOS

Cited by 7 publications

References 5 publications

A Ka-band 23dBm power amplifier based on 4-way parallel-series power combiner with loaded capacitors in 65-nm CMOS

A Ka-band 23dBm power amplifier based on 4-way parallel-series power combiner with loaded capacitors in 65-nm CMOS

IL analysis for 8‐way power combining network in 77–110 GHz 40 nm‐complementary metal–oxide–semiconductor PA design

Stacked-transistor mm-wave power amplifiers

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