2020
DOI: 10.3390/app10228254
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A Voltage Multiplier Circuit Based Quadratic Boost Converter for Energy Storage Application

Abstract: In this paper, a new transformerless high voltage gain dc-dc converter is proposed for low and medium power application. The proposed converter has high quadratic gain and utilizes only two inductors to achieve this gain. It has two switches that are operated simultaneously, making control of the converter easy. The proposed converter’s output voltage gain is higher than the conventional quadratic boost converter and other recently proposed high gain quadratic converters. A voltage multiplier circuit (VMC) is … Show more

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Cited by 14 publications
(5 citation statements)
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“…Notably, the high μ ave and low CV μ of the FET array are favorable for constructing large-scale and complex integrated circuits. As a proof-of-concept demonstration, we developed a binary ratio multiplier, which is an indispensable functional unit for a convolution algorithm in the neuromorphic chip, based on the patterned C 8 -BTBT single crystals (Figure g). The multiplier circuit integrated five FETs and was composed of a pseudo-CMOS inverter and a NAND gate (Figure h). In the multiplier circuit, the bottom gate electrodes were patterned by a shadow mask; the semiconductor layers of C 8 -BTBT single crystals were deposited and patterned by the method described in this work, followed by the thermal evaporation of the top electrodes.…”
Section: Resultsmentioning
confidence: 99%
“…Notably, the high μ ave and low CV μ of the FET array are favorable for constructing large-scale and complex integrated circuits. As a proof-of-concept demonstration, we developed a binary ratio multiplier, which is an indispensable functional unit for a convolution algorithm in the neuromorphic chip, based on the patterned C 8 -BTBT single crystals (Figure g). The multiplier circuit integrated five FETs and was composed of a pseudo-CMOS inverter and a NAND gate (Figure h). In the multiplier circuit, the bottom gate electrodes were patterned by a shadow mask; the semiconductor layers of C 8 -BTBT single crystals were deposited and patterned by the method described in this work, followed by the thermal evaporation of the top electrodes.…”
Section: Resultsmentioning
confidence: 99%
“…As a proof-of-concept demonstration, we developed for the rst time a binary ratio multiplier, which is an indispensable functional unit for convolution algorithm in the neuromorphic chip, based on the patterned C 8 -BTBT single crystals (Fig. 4g) [36][37][38] . The multiplier circuit integrated ve FETs and was composed of a pseudo-CMOS inverter and NAND gate (Fig.…”
Section: Resultsmentioning
confidence: 99%
“…The high-gain converter shown in Figure 14 is explained in [44]. This article introduces a DC-DC converter that achieves a substantial voltage gain while operating without a transformer and is suitable for low to medium-power applications.…”
Section: High-gain Quadratic Boost Converters IV (Hg-qbc Iv)mentioning
confidence: 99%