A VLSI receive beamformer for digital ultrasound imaging

Karaman, Mustafa; Kolagasioglu, Ertugrul; Atalar, Abdullah

doi:10.1109/icassp.1992.226510

Cited by 9 publications

(2 citation statements)

References 11 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The total memory requirement for such case to store the precalculated delays is about 1 Mbytes per channel (sensor), assuming that the sampling time resolution used for focusing the phased array is 10 times if the selected transducer center frequency is 5 MHz. This would require a large memory [20,21,22,23]. To resolve this problem, a pipelined sampled-delay focusing architecture is used.…”

Section: Delay Variationmentioning

confidence: 99%

Perception SoC Based on an Ultrasonic Array of Sensors: Efficient DSP Core Implementation and Subsequent Experimental Results

Kassem

Boukadoum

Haidar

2005

EURASIP J. Adv. Signal Process.

View full text Add to dashboard Cite

We are concerned with the design, implementation, and validation of a perception SoC based on an ultrasonic array of sensors. The proposed SoC is dedicated to ultrasonic echography applications. A rapid prototyping platform is used to implement and validate the new architecture of the digital signal processing (DSP) core. The proposed DSP core efficiently integrates all of the necessary ultrasonic B-mode processing modules. It includes digital beamforming, quadrature demodulation of RF signals, digital filtering, and envelope detection of the received signals. This system handles 128 scan lines and 6400 samples per scan line with a 90Ã‚Â° angle of view span. The design uses a minimum size lookup memory to store the initial scan information. Rapid prototyping using an ARM/FPGA combination is used to validate the operation of the described system. This system offers significant advantages of portability and a rapid time to market

show abstract

Section: Delay Variationmentioning

confidence: 99%

Perception SoC Based on an Ultrasonic Array of Sensors: Efficient DSP Core Implementation and Subsequent Experimental Results

Kassem

Boukadoum

Haidar

2005

EURASIP J. Adv. Signal Process.

View full text Add to dashboard Cite

show abstract

“…An efficient receive beamforming hardware structure can be obtained by employing a "local" coherent addition technique where the total coherent summation of all samples corresponding to a focal point is obtained by a sequence of pairwise partial coherent summations [25]. For an N channel system, at first, N / 2 partial coherent summations are obtained.…”

Section: Digital Beamformingmentioning

confidence: 99%

VLSI circuits for adaptive digital beamforming in ultrasound imaging

Karaman

Atalar

Köymen

1993

IEEE Trans. Med. Imaging

Self Cite

View full text Add to dashboard Cite

For phased-array ultrasound imaging, alternative beamforming techniques and their VLSI circuits are studied to form a fully digital receive front-end hardware. In order to increase the timing accuracy in beamforming, a computationally efficient interpolation scheme to increase the sampling rate is examined. For adaptive beamforming, a phase aberration correction method with very low computational complexity is described. Image quality performance of the method is examined by processing the non-aberrated and aberrated phased-array experimental data sets of an ultrasound resolution phantom. A digital beamforming scheme based on receive focusing at the raster focal points is examined. The sector images of the resolution phantom, reconstructed from the phased-array experimental data by beamforming at the radial and raster focal points, are presented for comparison of the image resolution performances of the two beamforming schemes. VLSI circuits and their implementations for the proposed techniques are presented.

show abstract