A VLSI demodulator for digital RF network applications: theory and results

Saulnier, G.J.; Puckette, C.M.; Gaus, R.; Dunki-Jacobs, R.J.; Thiel, Thorsten

doi:10.1109/49.62828

Cited by 28 publications

(11 citation statements)

References 10 publications

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“…As described in Figure , the discrete signal r [ n ] is down‐converted to r d [ n ] by multiplying the sequence p [ n ] = cos (2 πf IF n / f s ) − sin (2 πf IF n / f s ). This operation is identical to the down‐conversion proposed in and equivalent to the f s /4 down‐conversion described in .…”

Section: System Description and Analysismentioning

confidence: 83%

Fully digital BPSK demodulator for satellite supressed carrier telecommand system

Lucena

Filho

Figueredo

et al. 2016

Satell Commun Network

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Summary In this paper, we present the design of a fully digital binary phase shift keying demodulator for application in satellite high‐rate suppressed carrier telecommand system. The proposed system digitalizes the received signal in the intermediate frequency stage using bandpass sampling technique, and the resulting baseband signal is used to synchronization of symbol and phase and to bit detection. The design of all functional modules is presented in details. Another innovation presented in this work is the inclusion of a non‐linearity in the phase synchronizer module to permit its operation independent from the signal amplitude. Moreover, aiming the characterization and performance evaluation of the system, we do some original mathematical analyses. Finally, test results show that the demodulator complies all the project requirements, and the prototype implementation loss, in terms of bit energy to noise power density ratio, is less than 0.3 dB. Copyright © 2016 John Wiley & Sons, Ltd.

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Section: System Description and Analysismentioning

confidence: 83%

Fully digital BPSK demodulator for satellite supressed carrier telecommand system

Lucena

Filho

Figueredo

et al. 2016

Satell Commun Network

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“…It is a "positive-pass" filter with the imaginary input "grounded." The full complex structure can be seen, e.g., in [23] and [42]. In this paper, we study the general case.…”

Section: A Complex Filtersmentioning

confidence: 99%

“…5 [30], [33], [36]. We use the digital complex sampling technique [23], also called digital quadrature demodulation, in the demodulation process of this quadrature IF receiver. Digital complex sampling is a technique which uses IF sampling to produce baseband and signals.…”

Section: Complex If Receivermentioning

confidence: 99%

A novel adaptive mismatch cancellation system for quadrature IF radio receivers

Snelgrove²

1999

IEEE Trans. Circuits Syst. II

158

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This paper investigates and resolves in-phase/ quadrature phase (I=Q) imbalances between the input paths of quadrature IF receivers. These mismatches along the paths result in the image interference aliasing into the desired signal band, thus reducing the dynamic range and degrading the performance of the receivers. I=Q errors occur because of gain and phase imbalances between quadrature mixers. They are also caused by capacitor mismatches in analog-to-digital converters (A/D's), which are designed to be identical for each input path. This paper presents a novel and feasible digital signal processing (DSP) solution for the I=Q mismatch problems. The system includes a novel complex least mean square algorithm and a modified adaptive noise canceler (signal separator) to separate the desired signal and the image noise caused by the mismatch. The noise canceler can also solve the signal leakage problem, which is that the noise reference includes signal components. This system was implemented in a Xilinx FPGA and an Analog Devices DSP chip. It was tested with a complex intermediate frequency receiver, which includes an analog front end and a complex sigma-delta modulator. Both simulation results and test results show a dramatic attenuation of the image noise.Extending applications of the system to N -path systems further indicates the robustness and feasibility of this novel adaptive mismatch cancellation system.

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“…However, they do have two important problems: the dc-offset [2] and the in-phase/quadrature (I/Q) mismatch. Low IF receivers [3] solve the former problem, but the circuit and process are more complex as they need sharper filters and the sampling rate is higher if some kind of subharmonic sampling is not adopted [4]. Quadrature IF radio receivers [5] are able to solve the later by using two parallel IF stages and additional circuitry and process.…”

Section: Introductionmentioning

confidence: 99%

Digital quadrature demodulator with four phases mixing for digital radio receivers

Bravo

Cruz–Roldán

2003

IEEE Trans. Circuits Syst. II

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A digital quadrature demodulator is proposed that gives the complex components of the received signal. The adoption of a modulated local oscillator (LO) with four periodic phase states synchronized with the sampling avoids the use of two mixing paths, simplifying the radio-frequency (RF) circuits and allowing an effective VLSI integration. This receiver minimizes the in-phase/quadrature (I/Q) mismatch and, with an adequate choice of the periodic modulating sequence, avoids the direct current (dc) offset of the direct conversion receivers.

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A VLSI demodulator for digital RF network applications: theory and results

Cited by 28 publications

References 10 publications

Fully digital BPSK demodulator for satellite supressed carrier telecommand system

Fully digital BPSK demodulator for satellite supressed carrier telecommand system

A novel adaptive mismatch cancellation system for quadrature IF radio receivers

Digital quadrature demodulator with four phases mixing for digital radio receivers

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