Proceedings of the IEEE 1988 Custom Integrated Circuits Conference
DOI: 10.1109/cicc.1988.20929
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A VLSI chip set for a small mainframe processor

Shohei Yamada
1
,
T. Sano
2
,
Mikiko Saito
3
et al.
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The SDC cell-A novel design methodology for high-speed arithmetic modules using CMOS/BiCMOS precharged circuits

Hayashi
1
,
Doi
2
,
Asai
3
et al. 1990
IEEE J. Solid-State Circuits
6
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1
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The SDC cell-A novel design methodology for high-speed arithmetic modules using CMOS/BiCMOS precharged circuits

Hayashi
1
,
Doi
2
,
Asai
3
et al. 1990
IEEE J. Solid-State Circuits
6
0
1
0
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Design methodologies and CAD tools [VLSI]

Piguet1
1989
1989 Proceedings of the IEEE Custom Integrated Circuits Conference
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