A variable FPGA based generic QAM transmitter with scalable mixed time and frequency domain signal processing

Figuli, Shalina Percy Delicia; Sonnino, Alberto; Figuli, Peter; Becker, J.

doi:10.1109/tsp.2016.7760919

Cited by 1 publication

(5 citation statements)

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“…Moreover, ISIs due to crowding of symbols in higher order QAM constellations and the effect of noisy channels during data transmission have been weakened by the appendage of FEC technique as data redundancy curtails the SNR requirement of the system. The design has been simulated, synthesized, routed and tested on a Xilinx Virtex UltraScale + FPGA platform for N = 16 and 32 parallel inputs and for multiple QAM formats (16-QAM, 32-QAM, 64-QAM, 128-QAM and 256-QAM) with a system precision of 16 bits, Although FEC overhead can impair the performance gain of the system, additional architectural improvements by pipelining and availability of bounteous resources in Virtex UltraScale + have boosted the system performance by almost 60% when compared to [9] for 16 parallel inputs. Besides, the routing technology of UltraScale + also plays a role in utilizing more than 90% of the available resources without congestion issues.…”

Section: Discussionmentioning

confidence: 99%

“…This fair amount of core's instance is required as both imaginary and real parts have to be processed. In order to achieve maximum throughput, in contrast to [9], all stages of the parallel DFT (resp. IDFT) are pipelined.…”

Section: Discrete Fourier Transformmentioning

confidence: 99%

“…On the other hand, it is remarkable that despite its overhead, it has shown a significant improvement in throughput by almost 60% for all the modulation orders. This is mainly due to the architectural improvements (such as pipelining) over [9] and the availability of more resources in Virtex UltraScale + which allows higher degree of parallelization. Nevertheless, with FEC, the SNR improvement for 256-QAM is 73% while an enhancement of 60% is obtained for 16-QAM.…”

Section: Design Resources and Performances With Fecmentioning

confidence: 99%

“…14. Throughput comparison between "with FEC" and "without FEC" [9] filter and modulator. DFT and IDFT are omitted in the comparison chart for the purpose of detailed readability.…”

Section: Design Resources and Performances With Fecmentioning

confidence: 99%

“…Nevertheless, this impressive result is attenuated by the fact that their system doesn't comprise a filter [8]. Though much better and higher performances could have been This paper is an extended version of the work published in [9]. Consequently, the contributions of this work are:…”

Section: Introductionmentioning

confidence: 99%

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A Generic Reconfigurable Mixed Time and Frequency Domain QAM Transmitter with Forward Error Correction

Figuli

Sonnino

et al. 2017

IJATES

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Abstract-In the past three decades, Field Programmable Gate Arrays (FPGAs) have emerged to be the backbone of digital signal processing, especially in high-speed communication systems. However, today, these devices are clocked below 1 GHz and improvement in performance stays a big challenge on all abstraction layers, right from system architecture down to physical technology. Far and wide, myriad number of researches are done on methodologies and techniques which can deliver higher throughput with lower operating frequencies. Towards this projected objective, in this paper an efficient modulation technique like Quadrature Amplitude Modulation (QAM) along with mixed time and frequency domain approach and Forward Error Correction (FEC) technique have been utilized to employ a generic scalable FPGA based QAM transmitter with filter parallelization being executed in mixed domain. The system developed in this paper achieves an effective throughput of 12.8 Gb/s for 256-QAM with 16 parallel inputs having an operating frequency of 201.25 MHz, while a 18.7 Gb/s effective throughput is realized with 32 parallel inputs at 146 MHz. Thereby, it paves down a promising methodology for applications where having higher clock frequencies is a hard limit.

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Section: Discussionmentioning

confidence: 99%

Section: Discrete Fourier Transformmentioning

confidence: 99%

Section: Design Resources and Performances With Fecmentioning

confidence: 99%

“…14. Throughput comparison between "with FEC" and "without FEC" [9] filter and modulator. DFT and IDFT are omitted in the comparison chart for the purpose of detailed readability.…”

Section: Design Resources and Performances With Fecmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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