A user-configurable framework for testing prototype system-on-chip implementations

Manjikian, Naraig; Cordeiro, N.

doi:10.1109/newcas.2004.1359102

The 2nd Annual IEEE Northeast Workshop on Circuits and Systems, 2004. NEWCAS 2004.

DOI: 10.1109/newcas.2004.1359102

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A user-configurable framework for testing prototype system-on-chip implementations

Naraig Manjikian

N. Cordeiro

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Prototypiner a hierarchical ring interconnect for system-on-chip multiprocessor implementations

Manjikian¹

The 2nd Annual IEEE Northeast Workshop on Circuits and Systems, 2004. NEWCAS 2004.

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This paper descrihes the prototype implementation OS a hierarchical ring interconnect in programmable logic. Hierarchical rings provide advantages such as simplicity and mudularity for system-on-chip iniplementntinn. Results are pruvided that demonstrate the operation of lhe hierarchical ring in hardware. Integration of the hierarchical ring with instances of a system-on-c.hip multiprocessor is discussed for supporting interprocessor communication either directly with special instructions or indirectly through memory.

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Prototypiner a hierarchical ring interconnect for system-on-chip multiprocessor implementations

Manjikian¹

The 2nd Annual IEEE Northeast Workshop on Circuits and Systems, 2004. NEWCAS 2004.

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A user-configurable framework for testing prototype system-on-chip implementations

Cited by 1 publication

References 3 publications

Prototypiner a hierarchical ring interconnect for system-on-chip multiprocessor implementations

Prototypiner a hierarchical ring interconnect for system-on-chip multiprocessor implementations

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