A Unified Multibit PUF and TRNG Based on Ring Oscillators for Secure IoT Devices

Abstract

Physically Unclonable Functions (PUFs) and True Random Number Generators (TRNGs) are cryptographic primitives very well suited for secure IoT devices. This paper proposes a circuit, named multibit-RO-PUF-TRNG, which offers the advantages of unifying PUF and TRNG in the same design. It is based on counting the oscillations of pairs of ring oscillators (ROs), one of them acting as reference. Once the counter of the reference oscillator reaches a fixed value, the count value of the other RO is employed to provide the TRNG and the multibit PUF response. A mathematical model is presented that supports not only the circuit foundations but also a novel and simple calibration procedure that allows optimizing the selection of the design parameters. Experimental results are illustrated with large datasets from two families of FPGAs with different process nodes (90 nm and 28 nm). These results confirm that the proposed calibration provides TRNG and PUF responses with high quality. The raw TRNG bits do not need post-processing and the PUF bits (even 6 bits per RO) show very small aliasing. In the application context of obfuscating and reconstructing secrets generated by the TRNG, the multibit PUF response, together with the proposal of using error-correcting codes and RO selection adapted to each bit, provide savings of at least 79.38% of the ROs compared to using a unibit PUF without RO selection. The proposal has been implemented as an APB peripheral of a VexRiscv RV32I core to illustrate its use in a secure FPGA-based IoT device.

Threats, Attacks, and Cryptography Frameworks of Cybersecurity in Critical Infrastructures

“…[41,66,67]. Other published research papers develop a unified architecture of PUFs and TRNGs with the purpose of enhancing the compactness, scalability, flexibility, and reconfigurability of the system while increasing the security and privacy [68,69]. Lightweight or accelerated versions of block ciphers and stream ciphers are also developed for more efficient encryption/decryption of data and authentication policies [70][71][72][73].…”

Hardware-Intrinsic Physical Unclonable Functions by Harnessing Nonlinear Conductance Variation in Oxide Semiconductor-Based Diode

“…In this PUF, the angle of illumination is considered as the challenge and the 2D speckle pattern is its corresponding response. Current state-of-the-art PUFs mainly utilize complementary metal oxide semiconductor (CMOS) technologies that exploit the frequency of ring oscillators [ 12 , 13 , 14 ], the gate delay in multiplexers [ 15 , 16 , 17 ], and the stochastic initial state of static random access memory [ 18 , 19 , 20 , 21 ]. However, most CMOS-based PUFs suffer from not only high power consumption, poor entropy, and large-area overhead, but also vulnerability to machine learning attacks [ 6 , 9 , 10 , 22 ].…”

A RRAM-Based True Random Number Generator with 2T1R Architecture for Hardware Security Applications

“…Taneja et al designed an SRAM architecture with in-memory generation of both dynamic and multi-bit static entropy [ 15 ]. Baturone et al propose a circuit named multibit-RO-PUF-TRNG, which offers the advantages of unifying PUF and TRNG in the same design [ 16 ]. Stochastic HRS variation is the most common method used to implement TRNG.…”