A TX Clock Timing Technique for the CIJ Compensation of Coupled Microstrip Lines

Abstract

Abstract-By using the clock timing control at transmitter (TX), the crosstalk-induced jitter (CIJ) is compensated for in the 2-bit parallel data transmission through the coupled microstrip lines on printed circuit board (PCB). Compared to the authors' prior work, the delay block circuit is simplified by combining a delay block with a minimal number of stages and a 3-to-1 multiplexer. The delay block generates three clock signals with different delays corresponding to the channel delay of three different signal modes. The 3-to-1 multiplexer selects one of the three clock signals for TX timing depending on the signal mode. The TX is implemented by using a 0.18 μm CMOS process. The measurement shows that the TX reduces the RX jitters by about 38 ps at the data rates from 2.6 Gbps to 3.8 Gbps. Compared to the authors' prior work, the amount of RX Jitter reduction increases from 28 ps to 38 ps by using the improved implementation.

A Transmitter to Compensate for Crosstalk-Induced Jitter by Subtracting a Rectangular Crosstalk Waveform From Data Signal During the Data Transition Time in Coupled Microstrip Lines

“…This work achieves the data rate of 7.2 Gbps in the tightly coupled microstrip lines on FR4 PCB. Among the CIJ compensation schemes at Tx [7], [8], [12], this work showed the best performance in the jitter reduction. The amount of jitter reduction in [9] is larger than that of this work, because the channel length of [9] is much longer than that of this work (16 in compared with 4 in and 8 in).…”

“…12(a) shows the measured Rx jitter versus data rate, without and with the CIJ compensation and in the no-CIJ case (4-in microstrip lines). CIJ depends on the geometry of the coupled transmission line and is independent of data rate [7], [8], [12]. The CIJ values are almost constant at 43.6 3.7 ps for the data rate from 2.6 to 5 Gbps.…”

“…Several circuit techniques are published to reduce the effect of crosstalk and CIJ, as shown in Table I. The delay-control approach compensates for the difference in propagation delays among the even-, odd-, and static-signal modes [6]- [8]. In [6], the difference in the propagation delay of three modes is calibrated at Rx by using an analog delay line and a mode detector circuit, so that all of the signals with different modes arrive at the Rx sampling circuit simultaneously.…”

“…The rectangular waveform can be generated by using a relatively simple pre-emphasis circuit, which is widely used at Tx to reduce ISI at Rx. Also, this work does not require either a mode detector in [6]- [8] or a transition detector. Thus, a simple Tx circuit with a relatively small overhead compensates for the CIJ in this work.…”

“…Although [6] can be used at the transmitter (Tx), only an Rx implementation is presented. In [7] and [8], the different clock edge timings are applied at Tx for different signal modes by using a mode detector circuit, so that all of the signals with different modes arrive at Rx simultaneously. Because of the mode detector circuit, all three approaches [6]- [8] require relatively large power and chip area.…”