A two-port SRAM using a single-port cell array with a self-timed write-after-read control scheme to save 47% area &amp; 63% standby power

Bai, Fujun; Xiong, Baoyu; Xue, Xiaofei; Song, Weizhe; Baofeng, Wu; Ni, Fu; Yu, Bing; Duan, Huifu; Han, Xiaowei; Minzoni, Alessandro; Ren, Qiwei

doi:10.1109/asicon.2017.8252504

Slicing FIFOs for on-chip memory bandwidth exhaustion

Hasler

¹

,

Wittig

²

,

Matúš

³

et al. 2018

2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS)

2

0

Get access via publisher Add to dashboard Cite

Exaggerated anticipatory anxiety is common in social anxiety disorder (SAD). Neuroimaging studies have revealed altered neural activity in response to social stimuli in SAD, but fewer studies have examined neural activity during anticipation of feared social stimuli in SAD. The current study examined the time course and magnitude of activity in threat processing brain regions during speech anticipation in socially anxious individuals and healthy controls (HC). Method Participants (SAD n = 58; HC n = 16) underwent functional magnetic resonance imaging (fMRI) during which they completed a 90s control anticipation task and 90s speech anticipation task.

Self Timed SRAM Array with Enhanced low Voltage Read and Write Capability

Vernekar

¹

,

Kumar

²

,

Vasantha

³

2019

2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)

1

0

Get access via publisher Add to dashboard Cite

Exaggerated anticipatory anxiety is common in social anxiety disorder (SAD). Neuroimaging studies have revealed altered neural activity in response to social stimuli in SAD, but fewer studies have examined neural activity during anticipation of feared social stimuli in SAD. The current study examined the time course and magnitude of activity in threat processing brain regions during speech anticipation in socially anxious individuals and healthy controls (HC). Method Participants (SAD n = 58; HC n = 16) underwent functional magnetic resonance imaging (fMRI) during which they completed a 90s control anticipation task and 90s speech anticipation task.

A 3 nm-FinFET 4.3 GHz 21.1 Mb/mm² Double-Pumping 1-Read and 1-Write Psuedo-2-Port SRAM With a Folded Bitline Multi-Bank Architecture

Haraguchi

¹

,

Fujino

²

,

Yokoyama

³

et al. 2025

IEEE J. Solid-State Circuits

0

Get access via publisher Add to dashboard Cite

Exaggerated anticipatory anxiety is common in social anxiety disorder (SAD). Neuroimaging studies have revealed altered neural activity in response to social stimuli in SAD, but fewer studies have examined neural activity during anticipation of feared social stimuli in SAD. The current study examined the time course and magnitude of activity in threat processing brain regions during speech anticipation in socially anxious individuals and healthy controls (HC). Method Participants (SAD n = 58; HC n = 16) underwent functional magnetic resonance imaging (fMRI) during which they completed a 90s control anticipation task and 90s speech anticipation task.

A two-port SRAM using a single-port cell array with a self-timed write-after-read control scheme to save 47% area & 63% standby power

Cited by 5 publications

References 3 publications

Slicing FIFOs for on-chip memory bandwidth exhaustion

Slicing FIFOs for on-chip memory bandwidth exhaustion

Self Timed SRAM Array with Enhanced low Voltage Read and Write Capability

A 3 nm-FinFET 4.3 GHz 21.1 Mb/mm² Double-Pumping 1-Read and 1-Write Psuedo-2-Port SRAM With a Folded Bitline Multi-Bank Architecture

Contact Info

Product

Resources

About

A two-port SRAM using a single-port cell array with a self-timed write-after-read control scheme to save 47% area & 63% standby power

Cited by 5 publications

References 3 publications

Slicing FIFOs for on-chip memory bandwidth exhaustion

Slicing FIFOs for on-chip memory bandwidth exhaustion

Self Timed SRAM Array with Enhanced low Voltage Read and Write Capability

A 3 nm-FinFET 4.3 GHz 21.1 Mb/mm2 Double-Pumping 1-Read and 1-Write Psuedo-2-Port SRAM With a Folded Bitline Multi-Bank Architecture

Contact Info

Product

Resources

About

A 3 nm-FinFET 4.3 GHz 21.1 Mb/mm² Double-Pumping 1-Read and 1-Write Psuedo-2-Port SRAM With a Folded Bitline Multi-Bank Architecture