A two-dimensional analytical model for threshold voltage of short-channel triple-material double-gate metal-oxide-semiconductor field-effect transistors

Abstract

A two-dimensional (2D) analytical model for the threshold voltage of fully depleted short-channel triple-material double-gate (DG) metal-oxide-semiconductor field-effect transistors (MOSFETs) is presented in this paper. The 2D Poisson’s equation has been solved with suitable boundary conditions by applying the parabolic potential approximation. The lightly doped channel has been taken to enhance the device performance in terms of higher carrier mobility and minimum dopant fluctuation. The improved hot carrier effects over the double-material DG MOSFETs have been demonstrated. Different length ratios of three channel regions related to different gate materials have been optimized to minimize short-channel effects. The effects of device parameters on the threshold voltage have also been discussed. The model results have been compared with the simulation data obtained by using the commercially available device simulation software ATLAS™.

Analytical study of Dual Material Surrounding Gate MOSFET to suppress short-channel effects (SCEs)

“…For the two regions under the gate material M 1 and M 2 , the solution of the Poisson's equation can be written as Region 1 : f S1 ðzÞ ¼ Ae lz þ Be Àlz À b 1 l 2 for 0 z L 1 (12) Region 2 : f S2 ðzÞ ¼ Ce lz þDe Àlz À b 2 l 2 for L 1 <z ðL 1 þL 2 Þ…”

“…To get further improvement against SCEs Tiwary et al [12] proposed TM-DG MOSFET and also developed an analytical subthreshold model. It is inevitable that all variants of FinFETs will finally change to surrounding gate nanowire FETs, because of their best electrostatic gate-control, higher control of SCEs and larger channel area for the nanowire surface per unit area [13e15].…”

Effect of gate engineering in double-gate MOSFETs for analog/RF applications

“…Mohankumar et al [31] investigates the influence of channel and gate engineering on the analog/RF performance of DG MOSFETs. Although the d.c. properties of TM-DG MOSFET is reported [9,10], the analog/RF performance characteristics of TM-DG MOSFET has not been reported yet. Therefore, in this paper, we report, for the first time, a systematic investigation of the analog/RF performance FOMs for SM-DG, DM-DG and SM-DG MOSFET separately.…”

“…On the other hand, a DM-DG SOI MOSFETs proposed by Reddy et al [8] employs gate-material engineering to reduce SCEs as compared with the DG SOI MOSFET. To get further improvement against SCEs Tiwary et al [9] proposed TM-DG MOSFET. In this structure MOSFET have two gates and every gate consist of three different materials with different work function.…”

Performance Analysis of Gate Misaligned Triple Material Double Gate (TMDG) MOSFET

“…It concludes that, it exhibits significantly reduced shortchannel effects (SCE) when compared with the DG SOI MOSFET and further, model for the drain current, transconductance, drain conductance, and voltage gain is also discussed [5]. Pramod Kumar Tiwari and Sarvesh Dubey has proposed a two-dimensional analytical model for threshold voltage of short-channel Triple-material Double-gate (TM-DG) MOSFET [6]. TM-DG MOSFET is superior to DM-DG MOSFET in terms of screening these effects, since the number of material increases.…”