A Tunable Pseudo-Differential OTA With $-78~{\hbox {dB}}$ THD Consuming 1.25 mW

Luján-Martínez, C.; Carvajal, R.G.; Galán, J.; Torralba, A.; Ramírez-Angulo, J.; Lopez-Martin, A.J.

doi:10.1109/tcsii.2007.916757

Cited by 17 publications

(11 citation statements)

References 18 publications

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“…1(b)) which is 68 nV= ffiffiffiffiffiffi Hz p at 10 MHz (simulated with equal effective degeneration coefficient of 2.7 as of the proposed OTA) as the large degeneration resistor contributes significant amount of noise which is comparable with the attenuator noise in the proposed OTA. Table 2 summarizes the simulated performances of the proposed OTA along with some of the recent works [5,6,9,12]. Compare to most of the previous designs, large linear range is achieved in lower process technology with higher frequency range and much lower power consumption.…”

Section: Simulation Resultsmentioning

confidence: 99%

“…From Eq. 8 it is evident that the harmonic components in (5) and (6) are effectively cancelled out and the attenuator provides linear attenuated output differential voltage. However, some non-linearity still exists in the attenuated output due to mobility degradation, higher order components and other non-idealities.…”

Section: Proposed Transconductance Amplifiermentioning

confidence: 99%

“…In [4] two source degenerated differential pairs have been used to cancel harmonic distortion. Pseudo-differential structures [5,6] can achieve better linearity over the conventional differential pair because of the absence of tail current source. They are generally characterized by very poor common-mode rejection ratio and require highly efficient common-mode feedback circuit [6,14].…”

Section: Introductionmentioning

confidence: 99%

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A highly linear CMOS transconductance amplifier in 180 nm process technology

Kar

Sen

2011

Analog Integr Circ Sig Process

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The present article describes the design and analysis of an operational transconductance amplifier (voltage to current converter) with wide linear input range. The proposed configuration combines the techniques of signal attenuation and source degeneration in order to reduce the odd order harmonic distortion significantly. The proposed circuit is compared with several circuit topologies based on MOS differential pairs with respect to their achievable linearity, input referred noise and power consumption. The linear transconductor is designed and simulated in 180 nm CMOS process technology with 1.8 V power supply. Simulation results show third order harmonic distortion (HD 3 ) of -70 dB for 600 mV pp input signal. For 1% transconductance variation the linear range is about 1.2 V pp . The input referred noise of the transconductor is 70 nV= ffiffiffiffiffiffi Hz p at 10 MHz. The quiescent power consumption is only 450 lW.

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Section: Simulation Resultsmentioning

confidence: 99%

Section: Proposed Transconductance Amplifiermentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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A highly linear CMOS transconductance amplifier in 180 nm process technology

Kar

Sen

2011

Analog Integr Circ Sig Process

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“…Adaptive biasing, resistive source degeneration with passive resistors or active counterparts, cross-coupled differential pairs, triodemode input transistors, the techniques based on floating gate and quasi-floating gate transistors and various methods of derivative superposition are frequently used to linearize OTAs [17][18][19][20][21][22][23][24][25]. In some cases, two or more techniques are combined to obtain higher linearity [10,12,13,[26][27][28][29].…”

Section: Introductionmentioning

confidence: 99%

A new controllable adaptive biasing linearization technique for a CMOS OTA and its application to tunable Gm-C filter design

Rezaei

Azhari

2015

Microelectronics Journal

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“…The use of passive resistors precludes continuous tuning, while the use of MOS transistors precludes programmability of transconductance in a wide range. Besides these techniques, new OTA topologies and operation modes, such as weak and moderate inversion, have been exploited [8], [9]. Transconductors using active resistors based on transistors operating in the triode region is a straightforward way to achieve a programmable linear V-I conversion.…”

Section: Introductionmentioning

confidence: 99%

Low-Voltage Tunable Pseudo-Differential Transconductor with High Linearity

Galán¹,

Carrasco²,

Pennisi³

et al. 2009

ETRI J

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A novel tunable transconductor is presented. Input transistors operate in the triode region to achieve programmable voltage-to-current conversion. These transistors are kept in the triode region by a novel negative feedback loop which features simplicity, low voltage requirements, and high output resistance. A linearity analysis is carried out which demonstrates how the proposed transconductance tuning scheme leads to high linearity in a wide transconductance range. Measurement results for a 0.5 μm CMOS implementation of the transconductor show a transconductance tuning range of more than a decade (15 μA/V to 165 μA/V) and a total harmonic distortion of −67 dB at 1 MHz for an input of 1 V pp and a supply voltage of 1.8 V.

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A Tunable Pseudo-Differential OTA With $-78~{\hbox {dB}}$ THD Consuming 1.25 mW

Cited by 17 publications

References 18 publications

A highly linear CMOS transconductance amplifier in 180 nm process technology

A highly linear CMOS transconductance amplifier in 180 nm process technology

A new controllable adaptive biasing linearization technique for a CMOS OTA and its application to tunable Gm-C filter design

Low-Voltage Tunable Pseudo-Differential Transconductor with High Linearity

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