A trace-based Java JIT compiler retrofitted from a method-based compiler

Inoue, Hiroshi; Hayashizaki, Hiroshige; Wu, Peng; Nakatani, Toshio

doi:10.1109/cgo.2011.5764692

Cited by 29 publications

(45 citation statements)

References 12 publications

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“…We determine the location to start a new trace by traversing the edges in the TTgraph backward to effectively capture the entirety of each candidate hot path. We implemented our multi-level compilation scheme with the TTgraph-based trace selection algorithm in a trace-based Java JIT compiler [6]. Our results showed that our multi-level compilation improved the peak performance by up to 58.5% and 22.2% on average over the base condition that does not employ upgrade recompilations from the initial optimization level.…”

Section: Introductionmentioning

confidence: 78%

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Adaptive multi-level compilation in a trace-based Java JIT compiler

Inoue

Hayashizaki

et al. 2012

SIGPLAN Not.

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This paper describes our multi-level compilation techniques implemented in a trace-based Java JIT compiler (trace-JIT). Like existing multi-level compilation for method-based compilers, we start JIT compilation with a small compilation scope and a low optimization level so the program can start running quickly. Then we identify hot paths with a timer-based sampling profiler, generate long traces that capture the hot paths, and recompile them with a high optimization level to improve the peak performance. A key to high performance is selecting long traces that effectively capture the entire hot paths for upgrade recompilations. To do this, we introduce a new technique to generate a directed graph representing the control flow, a TTgraph, and use the TTgraph in the trace selection engine to efficiently select long traces. We show that our multilevel compilation improves the peak performance of programs by up to 58.5% and 22.2% on average compared to compiling all of the traces only at a low optimization level. Comparing the performance with our multi-level compilation to the performance when compiling all of the traces at a high optimization level, our technique can reduce the startup times of programs by up to 61.1% and 31.3% on average without significant reduction in the peak performance. Our results show that our adaptive multilevel compilation can balance the peak performance and startup time by taking advantage of different optimization levels.

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Section: Introductionmentioning

confidence: 78%

“…We implemented our adaptive multi-level compilation scheme with the TTgraph-based trace selection in our trace-JIT [1,6,10], which is based on the IBM J9/TR Java VM and JIT compiler [3]. Figure 8 shows a component view of our trace-JIT.…”

Section: Methodsmentioning

confidence: 99%

Adaptive multi-level compilation in a trace-based Java JIT compiler

Inoue

Hayashizaki

et al. 2012

SIGPLAN Not.

Self Cite

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“…Inoue et al [18] developed a trace-based JIT compiler that is based on the IBM J9/TR JVM. Similar to the Dynamo system, trace recording focuses on linear and cyclic traces where no join points except the head of cyclic traces are present.…”

Section: Related Workmentioning

confidence: 99%

Trace-based compilation for the Java HotSpot virtual machine

Häubl

Mössenböck

2011

Proceedings of the 9th International Conference on Principles and Practice of Programming in Java

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Traditional method-based just-in-time (JIT) compilation translates whole methods to optimized machine code. Trace-based compilation only generates machine code for frequently executed paths, so-called traces, that may span multiple methods.In this paper, we present our implementation of a trace-based JIT compiler in which we modified the mature, method-based Java HotSpot client compiler. To simplify trace recording, we added a bytecode preprocessing step that detects and directly marks loops within the bytecodes. We duplicated the existing bytecode interpreter and instrumented it for trace recording. In our implementation, traces can be anchored both at loop headers and at method entries. When a trace anchor has been executed frequently enough, trace recording is started. After several times of trace recording, our modified JIT compiler merges the recorded traces into a structure suitable for compilation. During compilation, trace-specific optimizations are applied and guarded with runtime checks if necessary. The generated machine code is then invoked by the interpreter or by already compiled traces. If a method part must be executed that was not covered by traces and therefore not compiled, or if a runtime guard fails, execution falls back to the interpreter.Benchmarks show an improved performance, less generated machine code and faster compilation compared to the methodbased Java HotSpot client compiler. The peak performance of the SPECjvm2008 benchmarks is increased by 9% on average, while 29% less machine code is generated. Similarly, the performance of the SPECjbb2005 benchmark is increased by 13% and the DaCapo 9.12 Bach benchmarks show a peak performance increase of 5% on average.

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“…This approach has been taken in e.g. [19]. An alternative approach that avoids this problem is to maintain thread-private traces [13,18], i.e.…”

Section: Introductionmentioning

confidence: 99%

Efficiently parallelizing instruction set simulation of embedded multi-core processors using region-based just-in-time dynamic binary translation

Kyle

Böhm

Franke

et al. 2012

Proceedings of the 13th ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, Tools and Theory for Embedded Syst

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Embedded systems, as typified by modern mobile phones, are already seeing a drive toward using multi-core processors. The number of cores will likely increase rapidly in the future. Engineers and researchers need to be able to simulate systems, as they are expected to be in a few generations time, running simulations of many-core devices on today's multi-core machines. These requirements place heavy demands on the scalability of simulation engines, the fastest of which have typically evolved from just-in-time (JIT) dynamic binary translators (DBT).Existing work aimed at parallelizing DBT simulators has focused exclusively on trace-based DBT, wherein linear execution traces or perhaps trees thereof are the units of translation. Regionbased DBT simulators have not received the same attention and require different techniques than their trace-based cousins.In this paper we develop an innovative approach to scaling multi-core, embedded simulation through region-based DBT. We initially modify the JIT code generator of such a simulator to emit code that does not depend on a particular thread with its threadspecific context and is, therefore, thread-agnostic. We then demonstrate that this thread-agnostic code generation is comparable to thread-specific code with respect to performance, but also enables the sharing of JIT-compiled regions between different threads. This sharing optimisation, in turn, leads to significant performance improvements for multi-threaded applications. In fact, our results confirm that an average of 76% of all JIT-compiled regions can be shared between 128 threads in representative, parallel workloads. We demonstrate that this translates into an overall performance improvement by 1.44x on average and up to 2.40x across 12 multithreaded benchmarks taken from the SPLASH-2 benchmark suite, targeting our high-performance multi-core DBT simulator for embedded ARC processors running on a 4-core Intel host machine.

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A trace-based Java JIT compiler retrofitted from a method-based compiler

Cited by 29 publications

References 12 publications

Adaptive multi-level compilation in a trace-based Java JIT compiler

Adaptive multi-level compilation in a trace-based Java JIT compiler

Trace-based compilation for the Java HotSpot virtual machine

Efficiently parallelizing instruction set simulation of embedded multi-core processors using region-based just-in-time dynamic binary translation

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