A toolset for model checking of PLC software

Pakonen, Antti; Mätäsniemi, Teemu; Lahtinen, Jussi; Karhela, Tommi

doi:10.1109/etfa.2013.6648065

Cited by 24 publications

(31 citation statements)

References 7 publications

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“…Pakonen et al also work on translating FBD programs to SMV models for verification purposes; their work is focused on generating an Eclipse-based tool, which does not per- form automatic transformations but provide vendor independence [87].…”

Section: Model Checking Textual Plc Programsmentioning

confidence: 99%

An overview of model checking practices on verification of PLC software

et al. 2014

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Programmable logic controllers (PLCs) are heavily used in industrial control systems, because of their high capacity of simultaneous input/output processing capabilities. Characteristically, PLC systems are used in mission critical systems, and PLC software needs to conform real-time constraints in order to work properly. Since PLC programming requires mastering low-level instructions or assembly like languages, an important step in PLC software production is modelling using a formal approach like Petri nets or automata. Afterward, PLC software is produced semiautomatically from the model and refined iteratively. Model checking, on the other hand, is a well-known software verification approach, where typically a set of timed properties are verified by exploring the transition system produced from the software model at hand. Naturally, model checking is applied in a variety of ways to verify the correctness of PLC-based software. In this paper, we provide a broad view about the difficulties that are encountered during the model checking process applied at the verification phase of PLC software production. We classify the approaches from two different perCommunicated by Prof. Einar Broch Johnsen and Luigia Petre. spectives: first, the model checking approach/tool used in the verification process, and second, the software model/source code and its transformation to model checker's specification language. In a nutshell, we have mainly examined SPIN, SMV, and UPPAAL-based model checking activities and model construction using Instruction Lists (and alike), Function Block Diagrams, and Petri nets/automata-based model construction activities. As a result of our studies, we provide a comparison among the studies in the literature regarding various aspects like their application areas, performance considerations, and model checking processes. Our survey can be used to provide guidance for the scholars and practitioners planning to integrate model checking to PLC-based software verification activities.

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Section: Model Checking Textual Plc Programsmentioning

confidence: 99%

An overview of model checking practices on verification of PLC software

et al. 2014

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“…Application areas are as diverse as those of PLCs -nuclear [2], chemical [9], rail traffic [11], automotive industry [12], or even knitting [13], just to name a few. Much research has focused on generating the system model automatically from standard PCL programming languages [14]. Even with non-standard vendor-specific languages in use, creating or generating the system model is relatively easy [14] when compared with specification of the properties.…”

Section: A Model Checking Of Process Control Application Softwarementioning

confidence: 99%

“…Much research has focused on generating the system model automatically from standard PCL programming languages [14]. Even with non-standard vendor-specific languages in use, creating or generating the system model is relatively easy [14] when compared with specification of the properties. Nevertheless, model checking is still far from common industry practice [12].…”

Section: A Model Checking Of Process Control Application Softwarementioning

confidence: 99%

“…For analyzing I&C systems, discrete time is usually a sufficient approximation for the cyclic processing of time in, for example, PLC equipment [15,16]. Still, different modelling tricks are sometimes required to properly handle timed aspects of the logic [14,17]. Techniques for real-time model checking do exist, but our experience has shown that real-time model checkers are not -as of yet -as practical in I&C applications as discrete-time tools are [18].…”

Section: A Model Checking Of Process Control Application Softwarementioning

confidence: 99%

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User-friendly formal specification languages - conclusions drawn from industrial experience on model checking

Pakonen

Pang

Buzhinsky

et al. 2016

2016 IEEE 21st International Conference on Emerging Technologies and Factory Automation (ETFA)

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Formal methods -such as model checking -have definite advantages over more commonplace verification techniques. By providing proof of the analyzed systems' correctness, they are especially useful in domains that are under regulatory supervision, like the nuclear industry. The foremost challenge for wider adoption of model checking is the effort and the expertise required for formalizing functional requirements into verifiable properties. A particular challenge in verifying the application software of industrial process control systems is taking into account the different sequencing and timing issues that arise from, e.g., the dynamic behavior of the plant processes being controlled. In this paper, we review specification languages that are aimed at making formal methods more accessible. We have collected 1079 sample formal properties from practical model checking projects in the nuclear industry, and identified repeatedly occurring property types. We present our findings, and based on the sample data, evaluate the applicability of different approaches on user-friendly property specification.

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“…Информация о других подходах к построению и анализу FBD/CFC-программ ПЛК может быть найдена, например, в работах [15][16][17].…”

Section: Introductionunclassified

Construction of CFC-Programs by LTL-Specification

Ryabukhin

Kuzmin

Sokolov

2017

Aut. Control Comp. Sci.

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Рябухин Д. А., Кузьмин Е. В., Соколов В. А. получена 1 марта 2016Аннотация. Статья продолжает серию работ, посвященных подходу к построению и вери-фикации «дискретных» программ логических контроллеров (ПЛК) по LTL-спецификации. Этот подход обеспечивает возможность анализа корректности программ логических контроллеров с по-мощью метода проверки модели (Model Checking). В рамках подхода в качестве языка специфика-ции программного поведения используется язык темпоральной логики LTL. Анализ корректности LTL-спецификации относительно программных свойств производится автоматически с помощью программного средства символьной проверки модели Cadence SMV.Ранее было показано, каким образом по корректной (проверенной на корректность относи-тельно программных свойств) LTL-спецификации происходит построение ST-, LD-и IL-программ. В этой статье описывается технология построения CFC-программ по LTL-спецификации. Язык непрерывных функциональных схем CFC (Continuous Function Chart) представляет собой разно-видность языка FBD (Function Block Diagram) -графического языка диаграмм принципиальных схем электронных устройств на микросхемах. В отличие от FBD язык CFC обеспечивает возмож-ность свободного размещения программных компонентов и их соединений на экране. Технология построения CFC-программ демонстрируется на примере.Представление ПЛК-программы на языке CFC в рамках подхода к программированию по LTL-спецификации в отличие от представлений на других стандартных языках дает возможность наглядного графического изображения потока данных от входных переменных к выходам ПЛК. Явным образом демонстрируется зависимость и влияние значений одних переменных на значе-ния других переменных во время исполнения программы за один проход рабочего цикла ПЛК. Фактически CFC-программа представляет собой схему потоков данных ПЛК-программы.Ключевые слова: программируемые логические контроллеры (ПЛК), построение и верифика-ция ПЛК-программ, LTL-спецификация, CFC-диаграммы Для цитирования: Рябухин Д. А., Кузьмин Е. В., Соколов В. А., "Построение CFC-программ ПЛК по LTL-спецификации", Моделирование и анализ информационных систем, 23:2 (2016), 173-184. Об авторах:Рябухин Дмитрий Александрович, orcid.org/0000-0002-0799-8868, аспирант, Ярославский государственный университет им. П.Г. Демидова, ул. Советская, 14, г. Ярославль, 150000 Россия, e-mail: dmitriy_ryabukhin@mail.ru Кузьмин Егор Владимирович, orcid.org/0000-0003-0500-306X, доктор физ.-мат. наук, доцент, профессор кафедры теоретической информатики, Ярославский государственный университет им. П.Г. Демидова, ул. Советская, 14, г. Ярославль, 150000 Россия, e-mail: kuzmin@uniyar.ac.ru Соколов Валерий Анатольевич, orcid.org/0000-0003-1427-4937, доктор физ.-мат. наук, профессор, зав. кафедрой теоретической информатики, Ярославский государственный университет им. П.Г. Демидова, ул. Советская, 14, г. Ярославль, 150000 Россия, e-mail: sokolov@uniyar.ac.ru Благодарности:Работа проводилась при финансовой поддержке РФФИ, грант №12-01-00281-a. 174Моделирование и анализ информационных систем. Т. 23, № 2 (2016)...

show abstract

A toolset for model checking of PLC software

Cited by 24 publications

References 7 publications

An overview of model checking practices on verification of PLC software

An overview of model checking practices on verification of PLC software

User-friendly formal specification languages - conclusions drawn from industrial experience on model checking

Construction of CFC-Programs by LTL-Specification

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