2002
DOI: 10.1109/ted.2002.801431
|View full text |Cite
|
Sign up to set email alerts
|

A three-valued D-flip-flop and shift register using multiple-junction surface tunnel transistors

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
1
1
1

Citation Types

0
7
0

Year Published

2005
2005
2022
2022

Publication Types

Select...
7
2

Relationship

0
9

Authors

Journals

citations
Cited by 25 publications
(7 citation statements)
references
References 10 publications
0
7
0
Order By: Relevance
“…Multi-valued flip flops have been researched for quite some time now [11][12][13].Ternary flip flops have been reported earlier using resonant tunneling diode (RTD) [20].Two latches using SWSFET based quaternary inverters are cascaded to form the master slave flip flop circuit. The quaternary inverter is designed by the selection of appropriate sources at different gate voltages for a single SWSFET [5].The two CLK driven SWSFETs turn on the latches in such a way that the master stage is transparent during the high phase of the clock and the D input is passed to the master stage output Q M .…”
Section: Quaternary D Flip Flopmentioning
confidence: 99%
See 1 more Smart Citation
“…Multi-valued flip flops have been researched for quite some time now [11][12][13].Ternary flip flops have been reported earlier using resonant tunneling diode (RTD) [20].Two latches using SWSFET based quaternary inverters are cascaded to form the master slave flip flop circuit. The quaternary inverter is designed by the selection of appropriate sources at different gate voltages for a single SWSFET [5].The two CLK driven SWSFETs turn on the latches in such a way that the master stage is transparent during the high phase of the clock and the D input is passed to the master stage output Q M .…”
Section: Quaternary D Flip Flopmentioning
confidence: 99%
“…A threevalued shift register has been reported earlier [20]. Direction of data movement It requires four clock cycles to shift the quaternary input '3333' serially.…”
Section: Multi-valued Shift Registersmentioning
confidence: 99%
“…[1][2] [3]. Recent articles have shown much interest in the design of ternary memory circuits [4], [5], [6], [7], [8] [9].Many approaches and different realization schemes have been suggested .The excitation equation of binary D, T, RS, JK are used in the design of ternary flip-flops. The description of 3-valued memory elements is found in the references [10], [11].…”
Section: Introductionmentioning
confidence: 99%
“…The basic logic gates and the flip-flops are also reported [4][5][6][7][8][9][10] in MTN system using spatial light modulators (SLM) and savart plates. The flip-flops are the basic building block of sequential logic system.…”
mentioning
confidence: 99%