2003 46th Midwest Symposium on Circuits and Systems
DOI: 10.1109/mwscas.2003.1562220
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A third-order sigma-delta modulator for dual-mode receivers

Abstract: This paper presents a multibit sigma-delta modulator for GSM/WCDMA receivers. It uses a sigmadelta modulator with feedforward signal path to reduce the operational amplifiers nonlinearity effects. The improved performance of multibit topologies is exploited to reduce the oversampling ratio and to overcome stability limitations. A third-order 4bit feedforward sigma-delta modulator topology is chosen to meet both GSM and WCDMA specifications without needing additional hardware.Simulation results indicate that, 9… Show more

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Cited by 3 publications
(2 citation statements)
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References 11 publications
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“…A feedforward architecture is selected to implement the NTF due to its relaxed requirements on the analog blocks [4]. The OSR together with the sampling capacitor C s1 of the first high-pass filter (HPF 1 ) set the thermal noise level.…”
Section: A Architecture Overviewmentioning
confidence: 99%
See 1 more Smart Citation
“…A feedforward architecture is selected to implement the NTF due to its relaxed requirements on the analog blocks [4]. The OSR together with the sampling capacitor C s1 of the first high-pass filter (HPF 1 ) set the thermal noise level.…”
Section: A Architecture Overviewmentioning
confidence: 99%
“…A very powerefficient ∆Σ ADC is obtained by employing inverter-based amplifiers [2] and by using dynamic biasing in the first amplifier [3]. Additionally, the amplifier nonlinearity effects are reduced by adopting multi-bit quantization [4]. In order to circumvent the matching limitations of the digital-to-analog converter (DAC), a first-order tree-structured dynamic element matching (DEM) encoder is selected [5], synthesized and its effectiveness is verified through simulations.…”
Section: Introductionmentioning
confidence: 99%