A Technique for Improving the Linear Operating Range for a Relative Phase Delay Capacitive Sensor Interface Circuit

Meng, Yuan; Dean, Robert N.

doi:10.1109/tim.2015.2507698

Cited by 12 publications

(9 citation statements)

References 17 publications

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“…In the fitted models of averaged data, instead of being limited to 45° or 25% of each half cycle, the linear range of the new phase delay circuit was expanded to 138.60° or 77.0% of each half cycle. In the data set with the lowest R 2 of 0.9989, given by test number 1 (table 3), the linear range achieved 140.04° or 77.8% of each half cycle, which is also greater than that of 133.56° or 74.2% of each half cycle achieved by Meng and Dean (2016). Again, since the maximum phase delay also depends on the range of the measured variable capacitance and the frequency of the input square wave, the maximum phase delay can potentially be further extended in other applications.…”

Section: Testing and Resultsmentioning

confidence: 81%

“…The transistors have low dynamic output capacitances of 9 pF for the p-channel FET at V DS = −5 V and 7.8 pF for the n-channel FET at V DS = 5 V, along with low drain-source onresistances of 10.6 Ω for the p-channel FET at V GS = −2.7 V and 3.8 Ω for the n-channel FET at V GS = 2.7 V, which suits this application well. Specifically, using the low on-resistances to pull the V C up to V DD or down to ground, instead of switching to a smaller R of 10 kΩ as used in the previous work (Meng and Dean 2016), enables a relatively high operating frequency of the entire circuit.…”

Section: Mosfets Selectionmentioning

confidence: 99%

“…A previously published technique proposed to expand the range of linear operation by using an analog switch to lower the resistance, R, as soon as V C reached the trip voltage of the inverter (Meng and Dean 2016). Therefore, by temporarily reducing the time constant in the charging and discharging circuit, the otherwise error inducing charge remaining on C is quickly discharged, without adversely affecting the sensing function of the interface circuit.…”

Section: Introductionmentioning

confidence: 99%

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Improving the phase delay capacitive interface circuit technique using MOSFET switches

Meng¹,

Dean²,

Adams³

2019

Meas. Sci. Technol.

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Measuring the phase delay of an RC network with a known resistance and an unknown capacitance is a simple technique to determine the value of capacitance. In this technique, the state of an input square wave signal is buffered by CMOS inverters and delayed by an RC network which yields a pulse width modulated (PWM) signal according to the phase delay at the output. The duty cycle of the PWM signal is proportional to the unknown capacitance when the resistance is fixed. However, the response of this method becomes severely nonlinear if the phase delay is larger than approximately 45° due to incomplete charging and discharging processes of the unknown capacitor. A novel MOSFET interface circuit with a PMOS FET to charge the unknown capacitor and an NMOS FET to discharge it during each measurement cycle is presented. This method, which expands the range of linear operation, is demonstrated in simulation and experimentally validated using a fringing field capacitive sensor to measure the mass of added water. The novel circuit expands the linear operation to a phase delay of 140.04°, over which the R 2 value achieves 0.9989.

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Section: Testing and Resultsmentioning

confidence: 81%

Section: Mosfets Selectionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Improving the phase delay capacitive interface circuit technique using MOSFET switches

Meng¹,

Dean²,

Adams³

2019

Meas. Sci. Technol.

Self Cite

View full text Add to dashboard Cite

show abstract

“…They are used to measure displacement [2], acceleration [3], flow-rate [4], and humidity [5] and perform motion tracking [6]. The interfacing circuits that translate the change in the capacitance value to data in either an analogue or a digital domain, follow conversion paradigms that convert the sensor capacitance to either voltage [7], current [8], phase [9], frequency [10], time period [11] [12] or pulse-width [13]. Choosing the appropriate conversion technique depends on factors such as the type of excitation source employed, the nature of the dielectric used in the sensor, desired resolution, and update rate.…”

Section: Introductionmentioning

confidence: 99%

A Closed-Loop Capacitance to Pulse-Width Converter for Single Element Capacitive Sensors

Areekath

George

Reverter

2019

2019 13th International Conference on Sensing Technology (ICST)

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A novel closed-loop capacitance-to-pulse width converter (CPC) suitable for single element capacitive sensors that use sinusoidal excitation is presented in this paper. Its operation is realized using a new configuration based on a simple, yet effective, auto-balancing scheme. The hardware prototype of the proposed CPC is relatively less complex to implement than those presented so far in the literature. It provides a quasi-digital output at a high update rate. Additionally, the output is insensitive to parasitic capacitances of the sensor. The output possesses high linearity, with respect to change in the sensor capacitance, ranging +/-5 pF, with a nominal capacitance as high as 200 pF. It exhibits a maximum non-linearity error of 0.061%FS. The output of the prototype has a resolution of 13.31 bits. Also, its response time for a step-change in the sensor capacitance is about 13 ms. This sophisticated and inexpensive closed-loop CPC is a perfect fit as an interfacing circuit for single element capacitive sensors.

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“…Microelectromechanical systems (MEMS) have enabled the design of sensors with very high sensitivities, enabling a range of sensing applications [1]. Sensors that convert a physical stimulus into a capacitance are widely used for different purposes including detecting motion, pressure and acceleration [2][3][4][5]. Capacitive sensing has the benefits of a low temperature coefficient, low power dissipation and low noise.…”

Section: Introductionmentioning

confidence: 99%

Analysis of Sensitivity and Power Consumption of Chopping Techniques for Integrated Capacitive Sensor Interface Circuits

Vejdani

Allidina²,

Nabki

2017

JLPEA

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Abstract:In this paper, parameters related to the sensitivity of the interface circuits for capacitive sensors are determined. Both the input referred noise and capacitance of the input transistors are important for capacitive sensitivity. Chopping is an effective technique for signal conditioning circuits because of its capability of reducing circuit noise at low frequencies. The capacitive sensitivity and power consumption of various chopping techniques including the dual chopper amplifier (DCA), single chopper amplifier (SCA) and two-stage single chopper amplifier (TCA) are extracted for different values of total gain and sensor capacitance. The minimum sensitivity for each technique will be extracted based on the gain and sensor capacitance. It will be shown that designation of the amplifier and distribution of gain in the TCA and DCA are important for sensitivity. A design procedure for chopper amplifiers that illustrates the steps required to achieve either the best or the desired sensitivity while minimizing power consumption will be presented. It will be shown that for a small sensor capacitance and large total gain, the DCA has the best sensitivity, while for a large sensor capacitance and a lower gain, the SCA is preferable. The TCA is the desired architecture for an average total gain and a large sensor capacitance. Moreover, when the power consumption is the key requirement and the maximum sensitivity is not the goal; the TCA works best due to its potential to decrease the power consumption.

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A Technique for Improving the Linear Operating Range for a Relative Phase Delay Capacitive Sensor Interface Circuit

Cited by 12 publications

References 17 publications

Improving the phase delay capacitive interface circuit technique using MOSFET switches

Improving the phase delay capacitive interface circuit technique using MOSFET switches

A Closed-Loop Capacitance to Pulse-Width Converter for Single Element Capacitive Sensors

Analysis of Sensitivity and Power Consumption of Chopping Techniques for Integrated Capacitive Sensor Interface Circuits

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