2022
DOI: 10.1007/s10836-022-06006-x
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A Systematic Bit Selection Method for Robust SRAM PUFs

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Cited by 8 publications
(5 citation statements)
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“…These stable bits are then used to create the unique challenge-response pairs (CRPs) during the enrollment phase. Several algorithms are used to select stable bits such as the Temporal Majority Voting algorithm (TMV) [23], Neighborhood-based Bit Selection (NBS) [39], the Data Remanence Analysis (DRA) [24], and Systematic Selection method (SS) [38]. The TMV approach focuses on observing the stability of individual bitcells during the power-up process.…”
Section: ) Sram Processingmentioning
confidence: 99%
See 1 more Smart Citation
“…These stable bits are then used to create the unique challenge-response pairs (CRPs) during the enrollment phase. Several algorithms are used to select stable bits such as the Temporal Majority Voting algorithm (TMV) [23], Neighborhood-based Bit Selection (NBS) [39], the Data Remanence Analysis (DRA) [24], and Systematic Selection method (SS) [38]. The TMV approach focuses on observing the stability of individual bitcells during the power-up process.…”
Section: ) Sram Processingmentioning
confidence: 99%
“…Finally, the SS method aims to control the power supply ramp rate in order to identify the cells in the SRAM that are strongly biased, thereby resistant to circuit noise, voltage and temperature changes. Strong bit selection in [39], [23], and [38] requires complex and exhaustive experiments and analysis in order to determine the best parameters and thresholds. In addition, the experimental results are sensitive to variations in these environmental factors and the power supply rates, which could affect the reliability and robustness of the selected stable cells.…”
Section: ) Sram Processingmentioning
confidence: 99%
“…Given how one of the selling points of PUFs is their low cost of implementation, there is a push to reduce the ECC cost to a minimum. Some strategies employed are to make ECCs as efficient as possible [8][10] [11] or to develop selection methods to use only those bits in an SRAM array that most reliably power up to the same values [12]- [14]. In either case, it is important to accurately know the reliability of the resulting implementation to use the precise amount of ECC required, without over-or under-compensating, or to know how reliable the selection of cells really is.…”
Section: Introductionmentioning
confidence: 99%
“…On the contrary, the power-up behavior of the SRAM cells is heterogeneous, each cell has a certain reliability and sensitivity to changes in operating conditions [15]. Understandably, most works follow the homogeneous approach [5][7][9]- [14] [16], as developing an accurate model for the power-up behavior of SRAM cells is a complex undertaking. There are works that do propose one, but they come with limitations.…”
Section: Introductionmentioning
confidence: 99%
“…The effects of process variation and aging on the power-up states of SRAM arrays have been extensively studied. Over the years, researchers have proposed physically unclonable functions (PUFs) [19]- [21] and true random number generators (TRNGs) [20], [22], [23] using SRAMs for creating unclonable device identifiers (IDs), and generating on-chip encryption keys. Due to the process variation, it becomes feasible to extract unique device fingerprints and create random numbers from an SRAM array.…”
Section: Introductionmentioning
confidence: 99%