A System-on-Chip Based Hybrid Neuromorphic Compute Node Architecture for Reproducible Hyper-Real-Time Simulations of Spiking Neural Networks

Abstract

Despite the great strides neuroscience has made in recent decades, the underlying principles of brain function remain largely unknown. Advancing the field strongly depends on the ability to study large-scale neural networks and perform complex simulations. In this context, simulations in hyper-real-time are of high interest, as they would enable both comprehensive parameter scans and the study of slow processes, such as learning and long-term memory. Not even the fastest supercomputer available today is able to meet the challenge of accurate and reproducible simulation with hyper-real acceleration. The development of novel neuromorphic computer architectures holds out promise, but the high costs and long development cycles for application-specific hardware solutions makes it difficult to keep pace with the rapid developments in neuroscience. However, advances in System-on-Chip (SoC) device technology and tools are now providing interesting new design possibilities for application-specific implementations. Here, we present a novel hybrid software-hardware architecture approach for a neuromorphic compute node intended to work in a multi-node cluster configuration. The node design builds on the Xilinx Zynq-7000 SoC device architecture that combines a powerful programmable logic gate array (FPGA) and a dual-core ARM Cortex-A9 processor extension on a single chip. Our proposed architecture makes use of both and takes advantage of their tight coupling. We show that available SoC device technology can be used to build smaller neuromorphic computing clusters that enable hyper-real-time simulation of networks consisting of tens of thousands of neurons, and are thus capable of meeting the high demands for modeling and simulation in neuroscience.

Bio-realistic neural network implementation on Loihi 2 with Izhikevich neurons

“…Bio-realistic neural network implementation on neuromorphic hardware: There are studies that simulate bio-realistic neural networks on neuromorphic chips, such as the simulations of top-down and bottom-up interactions between visual cortical area (V4) and frontal cortical area [28]; and architectures inspired by the cerebellum for efficient supervised learning [29]. In [30], the simple network with 1000 neurons given in [20] is realized on neuromorphic compute node by using Izhikevich neurons. In [31], besides LIF and Izhikevich neuron model, AdEx neuron model is realized on IBM INC-3000 Neural Supercomputer.…”

Advances in Diagnostic Tools and Therapeutic Approaches for Gliomas: A Comprehensive Review

“…This architecture effectively utilizes both components, enabling the construction of smaller neuromorphic computing clusters capable of hyper-real-time simulations involving tens of thousands of neurons. This approach addresses the high demands for modeling and simulating neural networks in neuroscience [ 183 ].…”

“…To guarantee safety and flexibility for implantation in the brain, a small magnetoelectric (ME) antenna combined with a biocompatible polymer binder was employed. Extensive simulations using Multiphysics software, such as, IBM Neural Computer INC-3000, Hybrid neuromorphic compute (HNC) node and System-on-Chip (SoC) devices in a high bandwidth 3D mesh communication networkcan fine-tun the antenna’s resonant frequency, resulting in its compact size, ideal for brain implantation [ 183 ].…”

Data_Sheet_1.PDF

“…Further analysis by cycle-accurate simulations is then possible with the proposed framework. In addition, this work relates to Trensch and Morrison (2022), which discusses conception, implementation, and performance modeling of a so called "Hybrid Neuromorphic Compute (HNC)" node. Specifically, Trensch and Morrison (2022) focuses on efficient intra-node spike delivery incorporating DRAM memory that is external to the programmed system-on-chip (SoC) but forms a node together with it.…”

“…In addition, this work relates to Trensch and Morrison (2022), which discusses conception, implementation, and performance modeling of a so called "Hybrid Neuromorphic Compute (HNC)" node. Specifically, Trensch and Morrison (2022) focuses on efficient intra-node spike delivery incorporating DRAM memory that is external to the programmed system-on-chip (SoC) but forms a node together with it. Supported by latency measurements, a performance model for the HNC is defined and extended to mimic cluster operation.…”