A survey on silicon PUFs

Zerrouki, Fahem; Ouchani, Samir; Bouarfa, Hafida

doi:10.1016/j.sysarc.2022.102514

Cited by 16 publications

(7 citation statements)

References 65 publications

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“…The three main types of silicon PUFs are delay-based PUFs, memory-based PUFs, and analog electronic PUFs. These classes can be divided depending on the many sources of variation [18].…”

Section: Puf and Machine Learning Attack On Pufmentioning

confidence: 99%

VXorPUF: A Vedic Principles - Based Hybrid XOR Arbiter PUF for Robust Security in IoMT

Mahmud¹,

Sadhu²,

Yanambaka³

et al. 2023

Preprint

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The Internet of Medical Things (IoMT) is playing a pivotal role in the healthcare sector by allowing faster and more informed hospital care, personalized treatment, and medical solutions. A very effective and trustworthy solution for resource-constrained medical devices is provided by Physical Unclonable Functions (PUF) - based identity and authentication systems, however they are not yet entirely reliable. This paper proposes VXorPUF, a Vedic Principles - Based Hybrid XOR Arbiter PUF. Modeling attacks were performed on the proposed architecture and an accuracy of 49.80 % was achieved. Uniqueness, Reliability and Randomness were the figures of merit used to evaluate PUF.

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“…The three main types of silicon PUFs are delay-based PUFs, memory-based PUFs, and analog electronic PUFs. These classes can be divided depending on the many sources of variation [18].…”

Section: Puf and Machine Learning Attack On Pufmentioning

confidence: 99%

VXorPUF: A Vedic Principles - Based Hybrid XOR Arbiter PUF for Robust Security in IoMT

Mahmud¹,

Sadhu²,

Yanambaka³

et al. 2023

Preprint

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“…PUFs are often categorized into two major groups based on the fabrication method [36]: Silicon-Based PUFs: Silicon-based PUFs are created using variations in the manufacturing process of silicon chips or integrated circuits [5]. These variations are uncontrollable and unique to each device, making them suitable for generating device-specific and unpredictable responses.…”

Section: Based On Fabricationmentioning

confidence: 99%

“…This holds especially true for the Internet of Things (IoT) [1][2][3], which represents one of the central challenges, as it emerges in our personal lives and future industrial systems [4]. Physical unclonable functions (PUFs), which are used to create identifying strings and cryptographic keys, have become crucial as a hardware protection measure in recent years [5]. Physical unclonable functions (PUFs) have drawn a lot of interest because of their potential to offer strong security primitives for device authentication, safe key generation, and cryptographic protocols [6][7][8][9][10].…”

Section: Introductionmentioning

confidence: 99%

FPGA-Based PUF Designs: A Comprehensive Review and Comparative Analysis

Lata,

Cenkeramaddi

2023

Cryptography

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Field-programmable gate arrays (FPGAs) have firmly established themselves as dynamic platforms for the implementation of physical unclonable functions (PUFs). Their intrinsic reconfigurability and profound implications for enhancing hardware security make them an invaluable asset in this realm. This groundbreaking study not only dives deep into the universe of FPGA-based PUF designs but also offers a comprehensive overview coupled with a discerning comparative analysis. PUFs are the bedrock of device authentication and key generation and the fortification of secure cryptographic protocols. Unleashing the potential of FPGA technology expands the horizons of PUF integration across diverse hardware systems. We set out to understand the fundamental ideas behind PUF and how crucially important it is to current security paradigms. Different FPGA-based PUF solutions, including static, dynamic, and hybrid systems, are closely examined. Each design paradigm is painstakingly examined to reveal its special qualities, functional nuances, and weaknesses. We closely assess a variety of performance metrics, including those related to distinctiveness, reliability, and resilience against hostile threats. We compare various FPGA-based PUF systems against one another to expose their unique advantages and disadvantages. This study provides system designers and security professionals with the crucial information they need to choose the best PUF design for their particular applications. Our paper provides a comprehensive view of the functionality, security capabilities, and prospective applications of FPGA-based PUF systems. The depth of knowledge gained from this research advances the field of hardware security, enabling security practitioners, researchers, and designers to make wise decisions when deciding on and implementing FPGA-based PUF solutions.

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“…In contrast, other architectures require both identical placement and routing [11]. However, CROPUF consumes more resources than other SPUFs with the same number of CRPs like Arbiter [12] and Butterfly [13] PUFs. Also, the block is susceptible to modeling attacks based on Machine Learning (ML) [14].…”

Section: Introductionmentioning

confidence: 99%

Boosted PUF: Boosting Efficiency and Resilience in Configurable RO PUF for IoT Devices

Abulibdeh,

Saleh,

Mohammad

et al. 2024

Preprint

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In the realm of Internet of Things (IoT) security, the Physical Unclonable Function (PUF) emerges as a viable solution for generating individualized secure keys. These keys play a vital role in authentication, chip protection, and supply chain security, serving as crucial safeguards for resource-constrained IoT devices. This work introduces Boosted Configurable Ring Oscillator PUF (BC-PUF), an area-efficient variant of CROPUF that suits resource-constrained IoT devices. Additionally, BC-PUF employs an absorbent approach for the intermediate responses to optimize the utilization of CMOS delay configurations. Moreover, BC-PUF mitigates the risk of Machine Learning (ML)-based modeling attacks. BC-PUF is a multi-bit response architecture that has been developed, analyzed, and evaluated across 50 FPGAs, from each dataset of 10K Challenge-Response Pairs (CRPs) is extracted. Experimental results report average values of 50.2%, 40.4%, 42%, 3.925%, and 83% for uniformity, diffuseness, uniqueness, reliability, and Shannon entropy, respectively. In comparison to state-of-the-art designs, the BC-PUF design achieves area reductions ranging from 15% to 96.7% across various architectures and implementations, along with a power reduction of 9.7%. Moreover, BC-PUF demonstrates resilience against ML-based attacks, achieving a prediction accuracy of 51%.

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A survey on silicon PUFs

Cited by 16 publications

References 65 publications

VXorPUF: A Vedic Principles - Based Hybrid XOR Arbiter PUF for Robust Security in IoMT

VXorPUF: A Vedic Principles - Based Hybrid XOR Arbiter PUF for Robust Security in IoMT

FPGA-Based PUF Designs: A Comprehensive Review and Comparative Analysis

Boosted PUF: Boosting Efficiency and Resilience in Configurable RO PUF for IoT Devices

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