A Survey on Low-Power High Speed Full Adder Circuit in DSM Technology

Design of n-Bit Adder without Applying Binary to Quaternary Conversion

“…Kalbande tries to achieve high performance through minimizing the hardware implementation and power dissipation by using less number of transistors when a new design of HA and FA is proposed which uses quaternary input and a quaternary output as output without any need of binary-quaternary or vice versa converters [7]. As well as what is mentioned above, a survey can be found in [8].…”