A Survey of Techniques for Dynamic Branch Prediction

Abstract

Branch predictor (BP) is an essential component in modern processors since high BP accuracy can improve performance and reduce energy by decreasing the number of instructions executed on wrong-path. However, reducing latency and storage overhead of BP while maintaining high accuracy presents significant challenges. In this paper, we present a survey of dynamic branch prediction techniques. We classify the works based on key features to underscore their differences and similarities. We believe this paper will spark further research in this area and will be useful for computer architects, processor designers and researchers.

The Tribes of Machine Learning and the Realm of Computer Architecture

“…CARP uses cache coherence information as an additional feature in the alogrithm of Teran et al [173]. Seng and Hamerly 3 A boolean function is "linearly separable" if all false instances of the function can be separated from its all true instances using a hyperplane [121]. As an example XOR is linearly inseparable and AND is linearly separable.…”