A Survey of Hardware Trojan Taxonomy and Detection

Tehranipoor, Mohammad; Koushanfar, Farinaz

doi:10.1109/mdt.2009.159

Cited by 147 publications

(220 citation statements)

References 23 publications

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“…1 The incentive that drives the entire hardware Trojan field is the gain, G, that the adversary seeks as a result of inserting the Trojan. The related value for the defender is the loss, L, which they will suffer if the Trojan is successful.…”

Section: A Variables In the Security Economic Modelmentioning

confidence: 99%

“…On the other hand, even for the adversary, their creativity is not entirely unbounded, and the Trojans available to them may be classified into discrete kinds. Attempts to establish categories of strategies available to the opponents have resulted in a variety of Trojan and Trojan defense method taxonomies, such as those in [1]. The question of optimal taxonomies to use with our formulation is left for future work.…”

Section: A Variables In the Security Economic Modelmentioning

confidence: 99%

“…The relationship between the creator of the Trojan (the adversary) and developer of Trojan detection methods (the defender) is governed not only by novel circuit design and test methods but also by human incentives and creativity. The adversary may be motivated to accomplish a variety of objectives, including but not limited to, controlling the target device, reducing its reliability, causing it to exhibit aberrant behavior under certain conditions, or causing it to divulge secrets during operation [1]. The adversary has an array of means to accomplish said goals in that the Trojan may be inserted at any of a variety of points in the design cycle of the device and may manifest itself in any of a variety of physical embodiments that accomplish the desired effects in the circuit.…”

Section: Introductionmentioning

confidence: 99%

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Trust games: How game theory can guide the development of hardware Trojan detection methods

Graf

2016

2016 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)

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The development of circuit testing and verification methods is commonly driven by formal analysis centered on an abstract mathematical model of the error or defect the method is designed to detect. Hardware Trojans, however, confound attempts to develop simple representative models due to the varieties of their physical embodiments in a circuit and the creative nature of a rational human adversary. Since it is nonetheless desirable to have a mathematical framework for determining the effectiveness of hardware Trojan detection methods, we present a game theoretic framework for so doing. Modeling the Trojan maker and detection method designer as opposing players in a 2-person strategic game is a necessary step in our process. However, the ultimate utility of the approach depends on an accurate security economic model of both players that can correctly consider the players' incentives, empirically-derived detection method efficacy metrics, a comprehensive taxonomy of hardware Trojans, and the places in the design cycle of the circuit where the Trojan insertion and detection occur. In this paper, we present such a security economic model and the resulting game, which we call the Trust Game. We illustrate the value of this game primarily in the context of how it may guide the development of new hardware Trojan detection methods. We solve a representative game, illustrating the value of two common solution concepts, the iterated elimination of dominated strategies and Nash equilibrium. We further show that this framework has utility to both of the opposing players in the game. Finally, we recommend the development of standardized Trust Games that can be used to quickly measure the efficacy of both new hardware Trojans and hardware Trojan detection methods.

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Section: A Variables In the Security Economic Modelmentioning

confidence: 99%

Section: A Variables In the Security Economic Modelmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Trust games: How game theory can guide the development of hardware Trojan detection methods

Graf

2016

2016 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)

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“…The goal of IC reverse engineering is to uncover the functionality and internal structure (e.g., gate netlist, circuit schematic, layout, manufacturing process details) of the chip via techniques such as depackaging/delayering, high-resolution imaging, probing, and side-channel examination. With this knowledge, an attacker can more efficiently mount various attacks (e.g., fault injection, sidechannel), clone/counterfeit the design possibly with hardware Trojans inserted, and discover trade secrets (e.g., proprietary algorithms, hard-coded keys and instruction sequences) [1]- [5]. A number of commercial entities such as ChipWorks [6] and TAEUS [7] offer IC reverse engineering services and routinely reverse engineer chips on even the most advanced process technologies.…”

Section: Introductionmentioning

confidence: 99%

A secure camouflaged threshold voltage defined logic family

Erbagci

Akkaya

et al. 2016

2016 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)

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A myriad of security vulnerabilites can be exposed via the reverse engineering of the integrated circuits contained in electronics systems. The goal of IC reverse engineering is to uncover the functionality and internal structure of the chip via techniques such as depackaging/delayering, high-resolution imaging, probing, and side-channel examination. With this knowledge, an attacker can more efficiently mount various attacks, clone/counterfeit the design possibly with hardware Trojans inserted, and discover trade secrets. We propose a gate camouflaging technique that relies on the usage of different threshold voltage transistors, but with identical layouts, to determine the logic gate function. In our threshold voltage defined (TVD) camouflaging technique, every TVD logic gate has the same physical structure and is one time mask programmed with different threshold implants for different boolean functionality. We design and implement TVD logic gates in an industrial 65nm bulk CMOS process. Using post-layout extracted simulation, we evaluate the logic style for VLSI overheads (area, power, delay) versus conventional logic, for process variablity robustness, and for various security metrics. Further, we evaluate the macro block overheads for ISCAS benchmark designs under various levels of TVD gate replacement upto and including 100% replacement. TVD logic gates are found to be CMOS process compatible, low overhead, and to increase security against various forms of attacks.

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“…Given the wide reach of technology in every aspect of our everyday life, the impact of such hardware Trojans can be disastrous. Accordingly, intense research efforts have been invested in preventing and/or detecting hardware Trojan inclusion in various phases of IC design and fabrication [1,2].…”

Section: Introductionmentioning

confidence: 99%

VeriCoq: A Verilog-to-Coq converter for proof-carrying hardware automation

Bidmeshki

Makris

2015

2015 IEEE International Symposium on Circuits and Systems (ISCAS)

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Proof carrying hardware intellectual property (PCHIP) introduces a new framework in which a hardware (semiconductor) Intellectual Property (IP) is accompanied by formal proofs of certain security-related properties, ensuring that the acquired IP is trustworthy and free from hardware Trojans. In the PCHIP framework, conversion of the design from a hardware description language (HDL) to a formal representation is an essential step. Towards automating this process, herein we introduce VeriCoq, a converter of designs described in Register Transfer Level (RTL) Verilog to their corresponding representation in the Coq theorem proving language, based on the rules defined in the PCHIP framework. VeriCoq supports most of the synthesizable Verilog constructs and is the first step towards automating the entire framework, in order to simplify adoption of PCHIP by hardware IP developers and consumers and, thereby, increase IP trustworthiness.978-1-4799-8391-9/15/$31.00 ©2015 IEEE

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A Survey of Hardware Trojan Taxonomy and Detection

Cited by 147 publications

References 23 publications

Trust games: How game theory can guide the development of hardware Trojan detection methods

Trust games: How game theory can guide the development of hardware Trojan detection methods

A secure camouflaged threshold voltage defined logic family

VeriCoq: A Verilog-to-Coq converter for proof-carrying hardware automation

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