A Survey of Coarse-Grain Reconfigurable Architectures and Cad Tools

Abstract

According to the granularity of configuration, reconfigurable systems are classified in two categories, which are the fine-and coarse-grain ones. The purpose of this chapter is to study the features of coarse-grain reconfigurable systems, to examine their advantages and disadvantages, to discuss critical design issues that must be addressed during their development, and to present representative coarsegrain reconfigurable systems that have been proposed in the literature.Current and future applications are characterized by different features and demands, which increase the complexity of developing systems to implement them. The majority of contemporary applications, for instance DSP or multimedia ones, are characterized by the existence of computationally-intensive algorithms. Also, high speed and throughput are frequently needed since real-time applications (e.g. video conferencing) are widely-supported by modern systems. Moreover, due to the wide spread of portable devices (e.g. laptops, mobile phones), low-power consumption becomes an emergency need. In addition, electronic systems, for instance, consumer electronics may have strict size constraints, which make the silicon area a critical Controller CGRU CGRU CGRU CGRU CGRU CGRU Programmable Interconnections Config. Mem.

Energy Efficiency Improvement by Dynamic Reconfiguration for Embedded Systems

“…If a large computing circuit is designed by a small chunk of circuit configuration, it can help to solve this problem. Thus, coarse-grained reconfigurable architecture (CGRA) [11]- [15] has been attracting many researches [16], [17]. This paper also focused on CGRA and proposed a spatiotemporal module-based pipeline to design an energy-efficient system.…”

Μεθοδολογίες Αυτοματοποιημένης Εξερεύνησης Και Σύνθεσης Επαναδιατάξιμων Συνεπεξεργαστών Υλικού

“…Οι επαναδιατάξιμες αρχιτεκτονικές τοποθετούνται στο ενδιάμεσο μεταξύ των δύο προηγούμενων ακραίων περιπτώσεων, περιορίζοντας έτσι το βαθμό ευελιξίας τους σε συγκεκριμένους τομείς εφαρμογών. ΄Ενας σημαντικός αριθμός επαναδιατάξιμων αρχιτεκτονικών έχει ήδη προταθεί στη βιβλιογραφία [32]. Οι επαναδιατάξιμες αρχιτεκτονικές διακρίνονται σε αρχιτεκτονικές με δυνατότητες λεπτομερούς και αδρομερούς επαναδιάταξης.…”

“…An overview of the most popular reconfigurable architectures can be found in [32]. Fine-grained reconfigurable architectures, such as classical Field Programmable Gate Arrays (FPGAs), favor bit-level operations and mapping universality, but suffer from high reconfiguration delays and power consumption.…”

“…A large number of fine-and coarse-grained reconfigurable architectures have been presented in [31], [32], respectively. The former architectures favor bit level operations and exhibit high power dissipation and limited performance gains.…”

“…Moreover, array-based architectures (also a limited number of the row-based i.e. [120], [49]) are based on pre-defined interconnection structures and register allocations which limit the customization of the flexible datapath to the application's domain needs [32]. On the other hand, row-based architectures [119], [16], [121], [122] are synthesized according to: (i) the resource constraints (i.e.…”