A Survey of AI Enabled Edge Computing for Future Networks

Ramachandran, Prakash; Ranganath, Sunku; Bhandaru, Malini; Tibrewala, Sujata

doi:10.1109/5gwf52925.2021.00087

Cited by 6 publications

(2 citation statements)

References 3 publications

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“…To speedup the convergence, hierarchy processing techniques can also be applied [37,38]. An implementation of the CUDA Horn-Schunck method can be found in the CUDA Toolkit examples 9 , and it has recently been ported to SYCL using an automatic compatibility tool available on the Intel's oneAPI suite 10 .…”

Section: Image Processing For Optic Flowmentioning

confidence: 99%

“…To address these handicaps, there is a growing trend towards the adoption of accelerators, collectively referred to as xPU (including GPUs, FPGAs, SoCs, and more), which substantially reduce power footprint [9] when compared to general-purpose CPUs. However, employing accelerator languages designed for specific hardware architectures introduces compatibility obstacles meanwhile a custom code for each device (e.g., CUDA, VHDL, etc.)…”

Section: Introductionmentioning

confidence: 99%

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SYCL in the Edge: Performance Evaluation for Heterogeneous Acceleration

Faqir-Rhazoui,

García

2023

Preprint

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Edge computing is essential to handle increasing data volumes and processing capacities. It provides real-time, secure data processing near data sources, like smart devices, alleviating cloud computing energy use and saving network band-width. Specialized accelerators, like GPUs and FPGAs, are vital for low-latency edge computing but the requirements to customized code for different hardware and vendors supposes important compatibility issues. This paper evaluates the potential of SYCL in addressing code portability issues encountered in edge computing. We employed the Polybench suite to compare various SYCL implementations, specifically DPC++ and AdaptiveCpp, with the native solution, CUDA. The disparity between SYCL implementations was negligible, at just 5%. Furthermore, we evaluated SYCL in the context of specific edge computing applications such as video processing using three different optical flow algorithms. The results exposed a potential performance gap of 19% between CUDA and SYCL. This performance differential is the price one may need to pay when achieving the ability to successfully run the same code on two distinct edge boards with four different architectures, including x86/64 CPU, ARM CPU, NVIDIA GPU, and Intel GPU. These findings underscore SYCL’s capacity to increase productivity in term of development costs and facilitate the IoT deployment without being locked into a particular platform or manufacturer.

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Section: Image Processing For Optic Flowmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

SYCL in the Edge: Performance Evaluation for Heterogeneous Acceleration

Faqir-Rhazoui,

García

2023

Preprint

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SYCL in the edge: performance and energy evaluation for heterogeneous acceleration

Faqir-Rhazoui,

García

2024

J Supercomput

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Edge computing is essential to handle increasing data volumes and processing capacities. It provides real-time and secure data processing near data sources, like smart devices, alleviating cloud computing energy use, and saving network bandwidth. Specialized accelerators, like GPUs and FPGAs, are vital for low-latency edge computing but the requirements to customized code for different hardware and vendors suppose important compatibility issues. This paper evaluates the potential of SYCL in addressing code portability issues encountered in edge computing. We employed the Polybench suite to compare various SYCL implementations, specifically DPC++ and AdaptiveCpp, with the native solution, CUDA. The disparity between SYCL implementations was negligible, at just 5%. Furthermore, we evaluated SYCL in the context of specific edge computing applications such as video processing using three different optical flow algorithms. The results revealed a slight performance gap of 3% when transitioning from CUDA to SYCL. Upon evaluating energy consumption, the observed difference ranged from $$\pm 10\%$$ ± 10 % , depending on the application utilized. These gaps are the price one may need to pay when achieving the ability to successfully run the same code on two distinct edge boards. These findings underscore SYCL’s capacity to increase productivity in terms of development costs and facilitate IoT deployment without being locked into a particular platform or manufacturer.

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Hardware Design and Integration of Low-cost Edge AI Smart Power Management and Home Automation

Benadda

Benabdellah

2022

2022 International Conference on Artificial Intelligence of Things (ICAIoT)

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A Survey of AI Enabled Edge Computing for Future Networks

Cited by 6 publications

References 3 publications

SYCL in the Edge: Performance Evaluation for Heterogeneous Acceleration

SYCL in the Edge: Performance Evaluation for Heterogeneous Acceleration

SYCL in the edge: performance and energy evaluation for heterogeneous acceleration

Hardware Design and Integration of Low-cost Edge AI Smart Power Management and Home Automation

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