A Subthreshold Voltage Reference With Scalable Output Voltage for Low-Power IoT Systems

Lee, Inhee; Sylvester, Dennis; Blaauw, David

doi:10.1109/jssc.2017.2654326

Cited by 162 publications

(80 citation statements)

References 18 publications

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“…[1][2][3][4] The rationale behind BGR is based on the combination of two different voltages, one with proportional-to-absolute temperature (PTAT) characteristics and one with complementary-to-absolute-temperature (CTAT) in order to compensate drain current variations and generate a voltage reference, which is independent of temperature. Two main approaches exist based on either the difference between transistors threshold voltages [5][6][7][8][9] or on different current densities. 4 To achieve ultralow power consumption in CMOS technology, subthreshold operation transistors are used to implement voltage reference circuits.…”

Section: Introductionmentioning

confidence: 99%

Ultralow power voltage reference circuit for implantable devices in standard CMOS technology

Pereira-Rial

López

Carrillo

et al. 2019

Circuit Theory & Apps

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An ultralow power CMOS voltage reference for body implantable devices is presented in this paper. The circuit core consists of only regular threshold voltage PMOS transistors, thus leading to a very reduced output voltage dispersion, defined as ∕ , and extremely low power consumption. A mathematical model of the generated reference voltage was obtained by solving circuit equations, and its numerical solution has been validated by extensive electrical simulations using a commercial circuit simulator. The proposed solution incorporates a passive RC low-pass filter, to enhance power supply rejection (PSR) over a wide frequency range, and a speed-up section, to accelerate the switching-on of the circuit. The prototype was implemented in 0.18 m standard CMOS technology and is able to operate with supply voltages ranging from 0.7 to 1.8 V providing a measured output voltage value of 584.2 mV at the target temperature of 36 • C. The measured ∕ dispersion of the reference voltage generated is 0.65% without the need of trimming. At the minimum supply of 0.7 V, the experimental power consumption is 64.5 pW, while the measured PSR is kept below -60 dB from DC up to the MHz frequency range. KEYWORDS design methodology, picowatt, subthreshold, trim-free, ultralow power, voltage reference Int J Circ Theor Appl. 2019;47:991-1005.wileyonlinelibrary.com/journal/cta

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Section: Introductionmentioning

confidence: 99%

Ultralow power voltage reference circuit for implantable devices in standard CMOS technology

Pereira-Rial

López

Carrillo

et al. 2019

Circuit Theory & Apps

View full text Add to dashboard Cite

show abstract

“…It is widely used in various analog integrated circuits so as to produce a DC voltage insusceptible to power supply, process and temperature [1]. Nowadays, the development of Internet of things (IOTs) increases rapidly and the integration of chips grows increasingly higher, so design requirements such as precision, power consumption, temperature range and area of the bandgap voltage reference also enhances [2,3].…”

Section: Introductionmentioning

confidence: 99%

Design of a Bandgap Voltage Reference Working in Subthreshold Region with Low Voltage, High Precision in a Wide Temperature Range

Dai¹,

Li²,

An³

et al. 2018

dtetr

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Abstract. In this paper, a bandgap voltage reference working with high precision in a wide temperature range is proposed. The proposed bandgap voltage reference adopts self-biased structure without using resistor and operational amplifier. It adopts 6 stages of the proportional to absolute temperature circuit to increase temperature range. And it uses linearity compensation circuit to improve the temperature coefficient. Supported by GSMC 0.13 µm technology, with 1.2V supply voltage, the proposed bandgap voltage reference can generate a steady 66 mV reference voltage. Within the temperature range of -100 to 145 °C, the temperature coefficient is 8.5486 ppm/°C and the line sensitivity is 0.19245 mV/V. And the bandgap voltage reference covers a core area of 0.00396 mm 2 .

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“…In spite of the interest for low-voltage and low-power current references, only a limited number of topologies have been proposed so far, [6][7][8][9][10][11][12][13] especially if compared with the huge number of solutions proposed for the voltage reference counterpart (eg, see previous studies [14][15][16][17][18][19][20][21][22] ). The above current references achieve nanopower consumption, but they are unable to work with bias voltage (V DD ) lower than 1 V, except for the solution proposed by Cucchi et al, 12 which presents a minimum bias voltage of 0.8 V. It is worth pointing out that even 0.8 V is still too high for most of the emerging solutions for IoT nodes.…”

Section: Introductionmentioning

confidence: 99%

“…The aforementioned constraints for IoT systems are clearly transferred to the design specifications of current references.In spite of the interest for low-voltage and low-power current references, only a limited number of topologies have been proposed so far, 6-13 especially if compared with the huge number of solutions proposed for the voltage reference counterpart (eg, see previous studies [14][15][16][17][18][19][20][21][22] ). The circuit consists of a 2-transistor block that generates a proportional-to-absolute-temperature or a complementary-toabsolute-temperature voltage and a load transistor.…”

mentioning

confidence: 99%

A portable class of 3‐transistor current references with low‐power sub‐0.5 V operation

Crupi

Rose

Paliy

et al. 2017

Circuit Theory & Apps

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This work proposes a new class of current references based on only 3 transistors that allows sub-0.5 V operation. The circuit consists of a 2-transistor block that generates a proportional-to-absolute-temperature or a complementary-toabsolute-temperature voltage and a load transistor. The idea of a 3T current reference is validated by circuit simulations for different complementary metal-oxide-semiconductor technologies and by experimental measurements on a large set of test chips fabricated with a commercial 0.18 μm complementary metal-oxide-semiconductor process. As compared to the state-of-art competitors, the 3T current reference exhibits competitive performance in terms of temperature coefficient (578 ppm/°C), line sensitivity (3.9%/V), and power consumption (213 nW) and presents a reduction by a factor of 2 to 3 in terms of minimum operating voltage (0.45 V) and an improvement of 1 to 2 orders of magnitude in terms of area occupation (750 μm 2 ). In spite of the extremely reduced silicon area, the fabricated chips exhibit low-process sensitivity (2.7%). A digital trimming solution to significantly reduce the process sensitivity is also presented and validated by simulations. KEYWORDSCMOS analog design, current reference, Internet of things (IoT), low-power, low-voltage | INTRODUCTIONThe fast-increasing demand for Internet-of-things (IoT) systems poses several challenges to the circuit designers because of their stringent constraints in terms of energy efficiency, low standby power consumption, ultralow voltage operation, low area consumption, and reduced variability in spite of the device miniaturization. 1-5 Current references are key building blocks of analog and mixed-signal circuits used in IoT systems. Their principal task is to fix the bias point of the amplifier stages, thus playing a fundamental role in the performance of the overall system. The aforementioned constraints for IoT systems are clearly transferred to the design specifications of current references.In spite of the interest for low-voltage and low-power current references, only a limited number of topologies have been proposed so far, 6-13 especially if compared with the huge number of solutions proposed for the voltage reference counterpart (eg, see previous studies [14][15][16][17][18][19][20][21][22] ). The above current references achieve nanopower consumption, but they are unable to work with bias voltage (V DD ) lower than 1 V, except for the solution proposed by Cucchi et al, 12 which presents a minimum bias voltage of 0.8 V. It is worth pointing out that even 0.8 V is still too high for most of the emerging solutions for IoT nodes. A second common drawback of the proposed nanopower solutions is the large

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A Subthreshold Voltage Reference With Scalable Output Voltage for Low-Power IoT Systems

Cited by 162 publications

References 18 publications

Ultralow power voltage reference circuit for implantable devices in standard CMOS technology

Ultralow power voltage reference circuit for implantable devices in standard CMOS technology

Design of a Bandgap Voltage Reference Working in Subthreshold Region with Low Voltage, High Precision in a Wide Temperature Range

A portable class of 3‐transistor current references with low‐power sub‐0.5 V operation

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