This paper proposes a modularized threedimensional (3D) heterogeneous system integration platform architecture, namely, MorPACK (morphing package). The architecture of MorPACK platform achieves high performance and function flexibility with low silicon area cost by sharing the MorPACK common system platform (CSP) on heterogeneous system integration. An efficient reconfiguration is enabled thanks to the use of system bus interfaces and exchange the bare die/module by system dividing and tri-state interface connecting. Six SoC projects/designs are implemented to demonstrate the effectiveness of the proposed MorPACK platform. The average silicon area of each project is about 122.59 mm 2 using the TSMC 90 nm CMOS generic logic process technology. Compared with the total chip area 587.44 mm 2 obtained by implementing these projects separately, the results show that there are 79.13% fabrication cost reduced by the MorPACK platform. Besides, around 60% performance improvement of operation frequency can be benefited from the 3D-stacking technique.