A study of beta ratio improvement for solving the SRAM disturbance issue

Abstract

We analyzed that how gate-poly-undercuts caused the disturbance failure in static random access memory (SRAM) bit-cells embedded in display driver integrated circuit (DDI) products. The beta ratio (I ON of the pull-down transistor / I ON of the pass-gate transistor) degradation induced by gate-poly undercuts was the main factor of the disturbance failure. Regarding the relation of undercuts and beta ratio, the hypothesis is as following: When the undercuts exist, dopants implanted with the halo process reach below the channel area more closely and it makes well concentration more high. Hence, the performance of the transistor (TR) with undercut becomes slower than normal TR. As the gate length of the pull-down (PD) TR is smaller than that of the pass-gate (PS) TR, the performance of the PD TR becomes more degraded than that of the PS TR. Consequently, the beta ratio decreases. To enhance beta ratio, we changed the thickness of photo-mask materials for the gate-poly layer and reduced the gate-poly etch time. Thanks to those actions, beta ratio was improved and we could completely overcome the disturbance failure issue.